cRIO Hybrid Mode, Error 65700 Randomly

[Keith_W]

I have a project that operates in hybrid mode (chassis set to FPGA programming mode, some Scan Engine modules present). There are four modules in the RIO: 2 belong to the FPGA and 2 are scan engine.  The functionality of the two modules in the FPGA are as expected.  The scan engine modules are Slot 1: 9213, Slot 2: 9205.

Within my code, I use almost identically the VIs from http://www.ni.com/white-paper/9351/en to get the I/O variables from my Scan Engine modules so that I can use them elsewhere.  My problem is that, when the 'to more specific class' on the RSI module happens in the linked code, I usually (but not always) get an error 65700.  If the error occurs, it ALWAYS happens with the 9213, but NEVER with the 9205.  That is, I am able to programmatically enumerate the IO variables for the 9205 without failure every single time, but it works with the 9213 approximately 1/10 of the time.

LabVIEW claims that error 65700 means: "CompactRIO:  Unable to communicate with the module. Reinsert the module and check connections."  I've tried removing and replacing the module a few times without apparent success.  I've also tried deleting the module from the project and then having LabVIEW discover the module again.  Since the module is discovered in this way, it seems like that it *is* able to communicate with the module.

I found the post http://forums.ni.com/t5/LabVIEW/How-to-use-CIE-and-FPGA-target-on-the-same-cRIO-chassis/td-p/1177591 where the issue apparently was that they had empty FPGA bitfiles, but that isn't my problem because my FPGA is being successfully loaded and used as expected.

Any advice is appreciated.

[Beau_H]

Hey Keith,

And are you able to run the example from  http://www.ni.com/white-paper/9351/en? Also what version of LabVIEW and FPGA are you running? You said that this error only occurs sometimes is there any consistency to the fails, ie happens every 3rd run or on the first run?

[Keith_W]

My version of LabVIEW is 2010 Professional Development System.  I haven't picked up on any particular pattern to the fails except that it seems like it works more often the first time after I set the built executable to 'run as startup'

I haven't been able to try out the stock example because my experimental setup seems to have absconded.  However, the only difference between my 'discover modules.vi' code and the example is that, after the IO variables are extracted from the RSI modules, my code wraps each variable in an instance of a generic sensor or actuator class and delivers those to the rest of the system.

When I locate my RIO, I'll verify the operation of the example code and get back to you.

[Matti_Autioniemi]

Hi,

I had a similar situation (when using CIE in hybrid mode) and I solved it by putting a small delay between "FPGA Open VI Reference" and CIE functions. It seems it takes some time for cRIO to start Scan engine in hybrid mode and therefore the wait is needed. Error occurs because CIE functions try to read the module before Scan engine is active.

Hope this helps!

-Matti

[Keith_W]

I can't seem to get consistent behavior from this.  I added a ten second delay between loading the FPGA and running the 'refresh modules' vi.  I also made a new project and reimported all my code into it.  Now I get *really* chaotic behavior.  

Most often what happens now is that I get a system exception like the first attached log.  Also, I infrequently get a situation where the code works, but it identifies 35 analog input IO channels from the NI 9205 in slot 3 (which only has 32 channels...).  Then, it will at some point (that I haven't been able to identify yet, because it happens so rarely) get an error like the second attached log.

Note that all of these things seem only to happen when the code is run as a built executable.  When the same code is run from my development PC, it works as expected.

Also, I've tried reformatting and re-installing the software set with similarly chaotic results, and tried it on a different cRIO 9074.  I've also replaced the 9213 in slot 1 with another card of the same model number.  None of these things seem to stabilize the system.

Additionally, I tried running the example code from http://www.ni.com/white-paper/9351/en.  After putting my RIO in scan engine mode and deleting the FPGA bitfile, I ran just the 'discover io.vi', slightly modified:

This gives the following front panel outputs:

 

The outputs are the same if I have modules in the first four slots and if all of the slots are empty.  I refuse to believe this particular result, so I then loaded an image I made of my original program that didn't include the FPGA (scan engine mode only with module discovery).  I run that (as an executable), and it detects all modules and IO variables correctly.  

After that, i run the 'discover IO.vi' from above, and it works as expected.

From all this, I understand very little, but it seems like that the version of my project that uses the FPGA in hybrid mode does something very, very bad to my RIO.  I just have no idea what it is.

[ColdenR]

Hello Keith,

I did some digging, and it looks like this issue could be related to a problem with LabVIEW 2010 and RIO 3.5.1. It was fixed in NI-RIO 4.0. See this knowledgebase article:

http://digital.ni.com/public.nsf/allkb/23ecf1bb8fee02fc862577d9006ef417?OpenDocument

Would it be possible to upgrade to LabVIEW 2010 SP1, LabVIEW 2011 SP1, or LabVIEW 2012? This will allow you to get the most recent version of NI-RIO (4.1), and may eliminate the issue entirely. See this chart for compatibility:

http://digital.ni.com/public.nsf/allkb/577cc9a7dcfc73df8625738400116cc3?OpenDocument

Barring that, can you try running the example program in the example finder that's referenced in the first knowledgebase article I linked above? You can change the module number, or manually add all module numbers to that example. I'm wondering, for example, if the loop rate of the real-time code is too fast for module discovery, and if perhaps the code would work if you added a loop timer in the module discovery part of the code.

[zahnrad]

Hi,

same Problem here.

- LV14f1

- cRIO-9076

- NI RIO 14.0.1

- VI in hybrid Mode

If i download the compiled FPGA Bitfile, then select "Deploy All" it works fine - but only one(!?) time. When VI is stoped and restarted then i get the "Error 65700".

[Jacobson-ni]

Zahnrad,

I would suggest starting a new thread for your issue and attaching your vi/project instead of a picture so we can get a better idea of what you are doing.

This thread seems to have been abandoned a couple years ago, making a new post will help people focus on your issue in particular.

[zahnrad]

New Message/Thread:

http://forums.ni.com/t5/LabVIEW/Errror-65700-cRIO-in-Hybrid-Mode-LV14f1-and-NI-RIO-14-0-1/td-p/30794...