counters gating

[voh720]

I would like to generate two sets of pulse trains with my available counters (2): CTR0 is finite of about 50 pulses at 100Hz 80% duty cycle and CTR1 is continuous 40KHz and 50% duty cycle.  I would like to internally connect the output of CTR0 to the gate of CTR1.  The net effect is that I would get a 40KHz 50% signal for about 8ms and off for 2ms, repeat for 50 pulses.

After a couple hours of googling I found out that this not possible because labview use both counters to generate a finite pulse train.

Is this a show stopper?  Is there someway to do what I described above in labview?

I am using labview 8.5 with PCI6221 card.

Thanks in advance
hv

[JVP]

Hi HV,

The card that you are using is an M Series DAQ card. When you generate a finite pulse train, two counters are used. One counter is used to generate pulses, and the other is used as a gate. 

Best Regards,

Jignesh

[JVP]

Hi HV,

I would like to add a few things to my previous post. There is a way to do what you want to do with the PCI-6221. The approach you need to take will be a little different. Take a look at:

Creating a Delayed, Retriggerable and Finite Pulse Generator

Using One Counter to Generate a Retriggerable Finite Digital Pulse Train with a PCI-6602 and DAQmx

Retrigger and Repeat Finite Digital Pulse Train in LabVIEW

Let me know if you have any questions for me.

Best Regards,

Jignesh