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digital trigger line

Sorry about htis probably already been answered but not sure how to phrase it
 
I want to start acquiring data after a trigger and in the main NI example it shows the trigger in-line with the rest of the DAQ (first figure)
 
 
but I don't want this I want it as a seperate block (next figure, this is makebeleive as the trigger does not give a bool output but that is what I would like)
 
Is there any way of doing this, as I want to use PFI0 and on a digital edge
 
cheers
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The second code does not make too much sense?  The example will configure your card to acquire a finite number of sampels after the trigger is sensed on the specified PFI line.  Is this not what you want?  You might be asking about retriggering?  This can also be done and the acquisition can be done in a loop.  If you give a little more info we can give you what you are looking for.

 

Paul

Paul Falkenstein
Coleman Technologies Inc.
CLA, CPI, AIA-Vision
Labview 4.0- 2013, RT, Vision, FPGA
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Sorry think I may of not been clear enough, the specifics I am not worried about here is a layout of what I want to do. I want the following
 
Can this be done or do i need to use a digital line (i.e. Dev1/port0/line0) and look for when it is high
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If I get you correct you are trying to do something on a digital high edge.  There are two different things you are trying to do, the first case is a HW trigger using daq, this is internal to the DAQmx driver where you can program a task to start on a digital edge, essentially programming the DAQ card to do HW edge detection.  The second thing is software edge detection and gating.  Here you actually are going to setup a digital input line and poll it.  Use a shift register to detect a low to high transition and then pass the result to the case structure.

 

Paul

Paul Falkenstein
Coleman Technologies Inc.
CLA, CPI, AIA-Vision
Labview 4.0- 2013, RT, Vision, FPGA
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