fpga labview 8.2

[ErinDavey]

Awesome, so the code seems to work in LabVIEW and successfully does what it has been designed to do. When you run into trouble in TestStand are you getting any error messages in particular? If so, a screenshot would be very helpful!

[panninos]

No, there are no error messages in test stand.

[I.B.Hating]

What problems are you running into in TestStand when calling your FPGA VI? Are you opening one reference or multiple references to your FPGA target?

Have you seen the following article which describes how to call an FPGA VI in TestStand?

http://digital.ni.com/public.nsf/allkb/A309E41A3316466E8625720300444B2F

One thing you can try is to set TestStand to unload the reference after the step executes. To do this you can go to the step properties for the sequence that calls the FPGA VI and go to Run Options->Unload Option->"Unload after step executes"

You may also want to cross post this to TestStand forums to see if they have any further insight: http://forums.ni.com/t5/NI-TestStand/bd-p/330