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frequency measurement problem~

Hi guys, I am trying to make a cymometer on a spartan-3e fpga starter board using LabVIEW FPGA Module, I used a while loop to count the numbers of true values of pulse, but I am stucked now ,because I don't know how to send the count number out of the while loop in every 1 second interval. please help me , thanks in advance.
帖子被HENZ在 09-01-2009 12:44 AM
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Henz,

 

Can you put your code that you have thus far up?

 

Matt

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Hi mata76, thanks for your reply, what i have done so far is as below. Clearly, this is only a start of my cymometer design, but i think i need to solve this 1 second thing first, and it totally stumped me.

fadsf.jpg 

 

 

帖子被HENZ在 09-02-2009 08:03 AM
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Henz,

 

It is still not exactly clear what you are trying to do, but this might get you started:

 

Cymometer.png

 

Essentially all i have done is added a timing function - this one will force the loop to run at a fixed rate and then we will output the count via an indicator at 1 Hz.  I don't know what device your are using, so I just used one that I work with as an example.  I am using one of the R-series cards that uses a 40 MHz clock.  Since I force the loop to run only every 1000 ticks, I execute the diagram at 1/40k =  25 microseconds.  Every 40000 ticks (or 1 second) I update the indicator.  I use a wait function to make sure this updates at exactly every 1 s.  Is this what you are looking for?

 

Cheers, Matt

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Hi,mtat76.

 

thank you very much for your help, with your vi i can refresh the count value in each 1 sencond interval.

 

as you see, i want to make frequency measurement in this vi. still, i have questions about counter.

 

1. my target board "Spartan 3e starter board" is 50mhz, so if  i use 1000 ticks delay , the while loop will run at 1000/50mHz speed, and the count will be enabled in each 1000/50mHz cycle, i mean is this ok to measure the signal frequency, or should i move the count part outside this loop, so it can count contineously.

 

2. i'm not familiar with labview fpga, i use "rising_edge(clk)" in vhdl to count pulse, is there any similar way to count pulse in labview fpga? the method of using a shift register to judge different value of signal to count pulse can hardly output a correct value.

 

dfs.jpg

帖子被HENZ在 09-06-2009 08:20 AM
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HENZ wrote:

Hi,mtat76

 

1. my target board "Spartan 3e starter board" is 50mhz, so if  i use 1000 ticks delay , the while loop will run at 1000/50mHz speed, and the count will be enabled in each 1000/50mHz cycle, i mean is this ok to measure the signal frequency, or should i move the count part outside this loop, so it can count contineously.

 

This will depend on the your application and timing requirements.  However, at some point, your code will bump up against a ceiling (i.e. your code will not be able to execute in a single clock cycle) so efficieny in programming for faster speeds will be paramount. To run this wide open, you could just use  the count ticks function, but then there will be no guarantee that you will get your data as close to 1 Hz as possible (hence the reason I put in the wait which is an exact multiple of 50 MHz).

 

2. i'm not familiar with labview fpga, i use "rising_edge(clk)" in vhdl to count pulse, is there any similar way to count pulse in labview fpga? the method of using a shift register to judge different value of signal to count pulse can hardly output a correct value.

 

I am not exactly sure what the question is, but here is an implementation of counting using a 64-bit counter: http://zone.ni.com/devzone/cda/epd/p/id/5298. Let me know if this is more in line with what you are looking for.

 

Matt

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