02-08-2012 12:05 PM - edited 02-08-2012 12:10 PM
yes.i were able to generate the pwm signal with ni9401 with this code,but it was with the opcion which i have in the properties of this module.
But when i tried to generate the siganl with the other code it doesn´t work.
and i must do it with scanmode,no fpga
02-08-2012 12:18 PM
What is the problem with doing it as demonstrated in your screenshot?
Where is this code running? On the cRIO, or in Windows?
02-08-2012 12:24 PM
This code works ok:
this code doesn´t work,because when i tried to see the pwm signal on the oscilloscope, i can´t see it like in the another case.i just can see a signal which look a pwm signal,but it flashes. and if i tried to changed the tim/div on the oscilloscope,i can´t solve it
i am running the codes in the proyect explorer,with an archive .Ivproj, like this:
02-08-2012 12:31 PM
Your image shows that you are running that code in Windows, on the local computer. In this case you CANNOT get accurate timing due to the operating system and communication over the network to the cRIO. When you write the PWM value to the output, you are sending the duty cycle, and the FPGA generates the PWM signal. When you try to generate that PWM signal yourself on Windows, you're sending individual commands to turn on and off the output over the network, which will not happen at a consistent rate. There is no bug in your code, but it will never work at that frequency due to limitations in the operating system and network.
02-08-2012 12:35 PM - edited 02-08-2012 12:37 PM
the codes which i am running,are in jrio,the names are generacionpwm3.vi and pwmcri.vi
no in my computer
so it should work,shouldn´t it?
02-08-2012 12:47 PM - edited 02-08-2012 12:48 PM
maybe the problem could be this:
in the first case i have the timed loop dt=100 and 1kH,so it works slower than in the second code where i generate the pwm signal.??
02-08-2012 12:56 PM
In your code with the timed loop, where you write the duty cycle directly, the loop rate has no effect on the PWM generation. The PWM signal is generated independently by the FPGA. Try it out! It will not matter what the timed loop frequency is so long as it's slower than the PWM frequency.
What happens when you try to generate the PWM signal yourself at a lower frequency? Do you see the signal change?
Can you upload your whole project with all the relevant VIs instead of showing screen shots?
Why are you so insistent on doing this, when there's already a better way to generate a PWM signal that you know works?
02-08-2012 01:06 PM - edited 02-08-2012 01:08 PM
when i try to generate the pwm myself to lower frequency,the siganl didn´t change.
i upload the proyect .Ivproj,i hope that you will be able to see it,the archives are generacionpwm3(myself) and pwmcrio.
i am interesting in it,because i am doing my tesis to finish my degree, and the teacher just let me the way of generate the pwm signal myself. and the more fun is that he doesn´t know how to use labview and compactRIO so good,so i must do it alone 🙂
02-08-2012 01:07 PM
The project alone doesn't help - you need to include your VIs as well. Put them into a ZIP archive and attach that.
02-08-2012 01:10 PM
this are the archives,is it what you need?