generating a staircase waveform in LabVIEW FPGA

[Marvin9]

Can anyone tell me how to generate a staircase steps in LabVIEW FPGA of clock-cycle 40 MHz.

[mikeporter]

A stairstep is all you can generate with an analog output -- its the way they work. What exactly are you trying to do?

Mike...

[Marvin9]

As for example we can generate sine wave with sine wave generator on th FPGA target. Is there a way to generate staricase signals on FPGA target. There is no such generators in the FPGA library.

I can generate a staircase signal on the LabVIEW RT side. But I am using a 'build waveform' function to do that. And it is on the RT side. 

[mikeporter]

First of all, unless you are filtering the analog output, you aren't really generating a sine wave. You are generating something that at a gross scale looked like a sine wave, but if you look at the output with an oscilloscope and zoom in, you will see that it is really made up of small stair steps.

With an analog output you have a finite number of discrete levels that you can generate. This is why the analog output sections allow you to set ranges and scaling -- so.you can get the most out of the limits number of output levels.

I have seen mechanical systems that were literally shaking themselves apart trying to react to the step responses in the analog signals that were driving them. The solution is to.put a low pass filter on the output to filter out the high frequency components represented by the steps.

Mike...

[Marvin9]

I want to generate a discreet stairstep say at the rate of 10 kHz (discreet small steps underlying in a sine wave will be very small) with sizable size of steps. The steps are not related to sampling rate, or time period. Yes, you are right due to sampling rate (time period) a sine wave signal would actually be made up of small steps.

In the following link Altenbach has given a nice way of creating a stairstep in RT -

http://forums.ni.com/t5/LabVIEW/How-can-I-generate-a-staircase-waveform-in-Labview/m-p/455146/highli...

(or search with -------"How can I generate a staircase waveform in Labview")

I want to do the same thing in a FPGA target.

[GerdW]

Hi Marvin,

I want to generate a discreet stairstep say at the rate of 10 kHz … with sizable size of steps.

So all you need to do is to add your stepsize to a value in a shift register at certain points in time. Shouldn't be so hard to do in a loop…

Some pseudocode:

WHILE

  new value := old value + stepsize

  output new value

  wait 100µs

WEND

Add limit checks at your needs…

[crossrulz]

Here is something that should get you started.  You will need to add any timing information and the actual output to this look.  But the idea is to simply add your step size to your current size.  If you go above your max limit, set your level back to 0.  Since we are in FPGA, it is best to avoid the Quotient & Remainder (it uses a lot of gates).