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odd or even number comparison?

Anyone know how to compare an incoming number and tell whether it is odd or even? How about if it is whole or fractional? Thanks
 
Kirk
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quotient and remainder is your friend
 


Message Edited by JeffOverton on 05-27-2008 11:05 AM
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Why not divide by 2 and check the remainder.  For whole/fractional you can divide by one and check the remainder.
-Dave


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fabb wrote:
Anyone know how to compare an incoming number and tell whether it is odd or even? How about if it is whole or fractional? Thanks

You need to be very careful applying odd/even to floating point numbers. It is only defined for intergers. Especially, if the value is a result of some computations, it could actually be 2.000000001 instead of 2.
 
Same with whole vs. fractional. You probably need additional code to ignore small differences from whole numbers. Where does the data come from?
 
 
ODD/EVEN: If you have an integer datatype, do a bitwise AND with "1" and check if the result is zero (even) or not (odd).



Message Edited by altenbach on 05-27-2008 09:17 AM
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A no more efficient, but somewhat more compact take on the problem.

OddCheck.png

Jim

LV 2020
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Oddly here is an even more compact version Smiley Wink  (based on above code)

 

If it saves 3 seconds 33 times to 3 people my 5 minute time investment will start making profit!

 

19-09-2011 1-48-32 PM.png

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Why would you need two outputs? Knowing one output let's us conclude the state of the other.

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Convenience, personnal preferences and code clarity. Helps to not unavoid reverse logic that can be harder to comprehend. At least for me. Even if i not do not know that they are not unequal, i prefer lookin for even numbers than for not odd one in particular complex compound arithmetics operations.

 

Oddly again, it made me think that it would evenly be clearer if they were 2 distinct VIs.

 

19-09-2011 1-48-32 PM.png

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Anyone know which is more efficient on the FPGA?  The AND or the bitshift?


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Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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Since a bit shift is mostly just a routing issue in an FPGA, I would guess that would be more efficient.  The AND would only use 1 gate, so it would be practically free as well.  You will have much bigger things to save fabric with.


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