programmatically deployed/launched RT App with "Open FPGA" not executable

[BradNC]

Howdy--

Per the instructions in these links:

http://digital.ni.com/public.nsf/allkb/A7DBA869C000B5AE862570B2007C4170?OpenDocument

http://zone.ni.com/devzone/cda/tut/p/id/9640

and some others I've read through, I've written a PC-side VI that FTPs an RT Source Dist. over to my cRIO (9076), and then uses the "Run VI' method to launch the application.  For testing purposes, the RT VI has an optional call to a simple FPGA VI:

With the FPGA call disabled, everything runs correctly.  With the FPGA call, the "Run VI" method in the PC-side code returns Error 1003: "The VI is Not Executable".

The cRIO VI runs fine in interactive (front panel) mode both with and without the FPGA call.

Any ideas why this is happening?

I'm running LV 2011 on the PC, and NI-RIO 4.0 on the cRIO.  I've included the project files with this post if it helps.

Thanks a bunch, and have a great day.

[BradNC]

A few updates:

When built with the FPGA call, the build:

1)  Works fine when compiled as an Application and "Run as Startup" from the project environment (forces reboot of target)

2)  Gives the same Error 1003 when compiled as a Source Dist., and "Deployed" from the project environment, then run with the VI Server invoke node

3)  Gives Error 1000 ("VI is not in a state compativle with this operation") at invoke node when Source Dist. is FTP'd to target in such a way that the file paths are identical to those created on the target by method #2 above.

One thing #2 and #3 have in common is the presence of a "[Build Name]_depinstr.bin" file generated with the Source Dist. on the PC, that does not end up on the cRIO.  I haven't yet found an explaination of what this file is for.

[Julianne_K]

Hi bcro, 

First of all, see this document for common causes of the 1003 error. which is related to using VI server to launch an executable or VI. Also, what happens when you take the PC VI out of the equation? Does the FPGA VI work fine without errors when you run it from LabVIEW? Does the RT VI run fine as well? 

[BradNC · Accepted solution]

Well, it appears I had accumulated a bad bitfile associated with the FPGA VI (there were 2 of them in the bitfiles folder, where should only have been one).  The solution was to delete the old bitfiles and rebuild the FPGA portion of the project.