queries regarding DMA FIFOs

[Ravi_Shankar]

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I assumed that you were using one of NI's standard FPGA targets such as cRIO, R Series, or FlexRIO

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What do you think is present inside the cRIO or anyother NI's standard FPGA Targets? 

Spartan and Virtex are FPGA development boards manufactured by Xilinx.

http://www.xilinx.com/products/boards_kits/index.htm

The table below shows cRIO chassis number and corresponding FPGA Board.

Chassis	9072	9074	9101	9102	9103	9104
FPGA Chip	SPARTAN 3 1000	SPARTAN 3 2000	VIRTEX II 1000	VIRTEX II 1000	VIRTEX II 3000	VIRTEX II 3000

And FIFOs can be created on both these boards.

http://zone.ni.com/devzone/cda/tut/p/id/6983

	Virtex-II 3000	Virtex-II 1000	Spartan-3 1000	Spartan-3 2000	Virtex-5 LX30	Virtex-5 LX50	Virtex-5 LX85	Virtex-5 LX110
Total RAM (kbits)	1728	720	432	720	1152	1728	3456	4608
Blocks Size (kbits)	16	16	16	16	36	36	36	36

Memory Resources for Various FPGAs

Regards.

[julesjay]

HI,

I'm working with a PXI-7833R so it's well defined.

In fact I've got a problem with the default 10000 element of the host DMA FIFO. I've never seen that so the behaviour was strange due to these elements. 

I've changed my code and it's seems to work now. 

Thanks

[Ruhmann]

David,

I fully understand these products as I develop software for them.  What is inside a cRIO that is not inside the academic eval kit (without getting into too much detail) is an NI ASIC that provides DMA support over a PCI bus.