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"Open FPGA Reference Function" triggers a 100 ms pulse in digital I/O modules when called in Host program.

Working with Compact RIO, why do the outputs of my 9401 digital I/O module turn on for about 100 ms whenever an "Open FPGA Reference Function" is called in a Host Program?  Outputs are also driven high for 100 ms when "Close FPGA Reference" is called.  How do I prevent this?

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Llewellyn,

 

Check out the document on our website that talks about the NI 9401 Output Glitch, it suggests you configure all channels on the module to be digital inputs before performing the operations known to cause this issue. The list of operations doesn't include "Open FPGA Reference Function", but it does list "Downloading an FPGA VI after one has been loaded" which the Open FPGA Reference Function does by default.

 

I also found a bug report that is very similar to this issue (if not the same issue) that reports it being resolved in NI RIO 3.4. If you are using a version of RIO older than 3.4, you could try updating your driver.

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Ben Sisney
FlexRIO V&V Engineer
National Instruments
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I am working with older software (Labview 7.1, FPGA Module 1.1.0).  Apparently, NI RIO 3.4 does not support this older software, so upgrading the driver to NI RIO 3.4 is not a possibility.

 

I do have calls to Wait in the FPGA program, which the glich document indicates triggers the problem.

 

I am not sure I understand the workaround suggesting configuring all channels to digital inputs before performing problematic operations.  I need the channels to be digial outputs.  Is the suggestion to re-configure the channels to digital inputs programatically before the Wait call, then revert back to digial outputs programtically after the Wait?  How is this done as the program runs? 

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I set the initial mode for all channels in the NI 9401 to "Input" in the "FPGA Project Manager" and added an "Invoke Method" to the FPGA program to change all of the channles in the 9401 to "Output."  before outputs are written in the FPGA program.  It sounded like this is what you were suggesting as a work around for the glich.  I also remove all calls to "Wait" to eliminate any sleep modes.  The gliches are unchanged.  They occur every time "Open FPGA Reference" and "Close FPGA Reference" are called in the Host Program.  I even wrote a simple Host Program that had only the FPGA Open Reference and Close FPGA Reference, but the glich remained.  It turns on all channels of the 9401, even though only a few are enabled.

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