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several host vi called the same FPGA vi

Hi nadia,

 

coz I don't see why my loop should runs all the time

It's a hardware circuit - why shouldn't it run all the time? All other ICs also run all the time…

 

Hint: search for "plea for full words" in the forum - I would appreciate it…

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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@k.nadia wrote:

I'm agree with u @crossrulz, but I would like to optimize my program coz I don't see why my loop should runs all the time


But, again, we are talking FPGA.  You are actually de-optimizing it by adding additional code to it to disable that loop unless it is needed.  You need to think of FPGA code as a hardware circuit.  If it was actually software, then we could start to talk about ways to disable it.


GCentral
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