simultaneous read and write, various scenarios

[gtb1234]

The following is all working already but I may just be lucky so far. I would appreciate some feedback.

1) I am reading the same DAQMX task (digital input, 1 byte) from two separate simultaneously running loops. Completely asynchronous. One read is running very periodically at about once every 3 seconds in one loop, the other read is random, several scattered reads within a few minutes in the other loop. Will they eventually clash or is this ok? The channel and task are set up once before the loops start.

2) From my reading it appears that different DAQ tasks can be "simultaneously" read and written in different loops. I am reading from several analog inputs and a dig input  in one loop, while writing to other dig and analog tasks in another loop. Each individual output (DI and AI) has its own separate task. All these tasks control hardware in a 9172 chassis with DI, AI, DO, and AO modules. Is all this "simultaneous" activity OK or, again, will I eventually get into trouble. These are all one sample reads and writes. No waveform timing, generating or acquiring.

3) I am also reading the same local and global variables in different loops. I am NOT writing to these variables in multiple loops, however I am periodically writing to the global variables in one loop only, and reading the same variables in other loops. Timing on the reads and writes don't matter. The value is valid when it is read even if immediately before or after a write. Will these eventually clash as well?

Thanks

GTB

[PBear]

Hi GTB,

These are really fantastic questions and I think the community could probably benefit from an explanation.'

1.) You will not receive an error with one task calling multiple DAQmx Read VIs from different threads. In the event that multiple DAQmx Reads are called in software simultaneously in different threads, the DAQmx code is single threaded so the other call will be blocked until its turn. At your speeds this should be barely noticeable.

2.) Simultaneous DAQ refers to sharing sample clocks (hardware timing) amongst the various disciplines (AI, AO, DI, DO, Counters, etc.) to attain simultaneously sampled inputs/outputs across the two. For example, if you want to write and read on the analog lines, an AO task and AI task can be created and you can set the sample timing of the AI task to the sample clock of the AO task. Every AO sample you generate is in turn reading in a AI sample at the same time in hardware (very precise). You can run multiple tasks in the same program but they are not simultaneous unless hardware timing is involved. For example, you can write and read in the same program on the same board no problem but this is not "simultaneous." Synchronizing loops to achieve simultaneous single point sampling is only recommended on an FPGA target that is highly deterministic.

3.) If race conditions are not an issue in your application, this should be fine and you will not receive any errors or clashes. LabVIEW will take care of all this.

[gtb1234]

Thanks much for the reply.

gtb

[kandreas]

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PBear wrote:

2.) Simultaneous DAQ refers to sharing sample clocks (hardware timing) amongst the various disciplines (AI, AO, DI, DO, Counters, etc.) to attain simultaneously sampled inputs/outputs across the two. For example, if you want to write and read on the analog lines, an AO task and AI task can be created and you can set the sample timing of the AI task to the sample clock of the AO task. Every AO sample you generate is in turn reading in a AI sample at the same time in hardware (very precise). You can run multiple tasks in the same program but they are not simultaneous unless hardware timing is involved. For example, you can write and read in the same program on the same board no problem but this is not "simultaneous." Synchronizing loops to achieve simultaneous single point sampling is only recommended on an FPGA target that is highly deterministic.

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I tried to hook up the AI task to the sample clock of the AO task but still I have the feeling like there's an offset between these two operations. This offset is constant but it's not zero samples.  Does this mean that true simulaneous reading & writing is only possible with FPGA?

[Now_With_Underscores]

Hey Kandreas,

Let me explain "Synchronizing loops to achieve simultaneous single point sampling is only recommended on an FPGA target that is highly deterministic."  What PBear is saying is that if you're trying to simultaneously sample an analog input and output AND these two tasks are in different while loops, you will need an FPGA and single cycle timed loops to guarantee simultaneous sampling occurs.  True simultaneous sampling does NOT require an FPGA if you're acquiring in the same loop with the same clock.  Are you using a DSA card?  If so, there's a digital filter delay added that is part of the delta sigma conversion process.  What hardware are you using for AI and AO?

[kandreas]

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Knights Who Say NI wrote:

Hey Kandreas,

Let me explain "Synchronizing loops to achieve simultaneous single point sampling is only recommended on an FPGA target that is highly deterministic."  What PBear is saying is that if you're trying to simultaneously sample an analog input and output AND these two tasks are in different while loops, you will need an FPGA and single cycle timed loops to guarantee simultaneous sampling occurs.  True simultaneous sampling does NOT require an FPGA if you're acquiring in the same loop with the same clock.  Are you using a DSA card?  If so, there's a digital filter delay added that is part of the delta sigma conversion process.  What hardware are you using for AI and AO?

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I am using a PXI-6259 & PCI-6259 card. Currently I have one while loop for the AI, one for the analyis of the data, and one for the AO.

So if I put all three tasks into a single while loop, I can get the AI & AO to run true simultaneous?