synchronization daq-mx hs-dio

[bmann2000]

I'd like to synchronize nine 6123 cards (analog 100kHz) with six 6561 cards (LVDS 2MHz).  Correct me if I'm wrong, the correct technique is to use counters.  Use one 6123 counter to generate a 100kHz pulse sync'd to the analog acquisition.  Then configure a second 6123 counter as continuous trigger (20-pulses), trigger counter2 from counter1, this gives you a 2MHz pulse sync'd to the analog acquisition.  Then set TClk of LVDS to trigger from 6123 counter2.   Hey presto, all channels are sync'd together.

Writing it down is easy, but writing the code a little more tricky.  If any applications engineers or kudos seeking community members have achieved such a feat, please post example code, it'd be much appreciated.

[Andrew McL]

Hi bmann2000,

Do you want to do synchronous acquisition, with all the cards being triggered to acquire at the same time or want them to start at almost the same time? What system do you have all these cards in (i.e. PXI or PC)?

Thanks,

[bmann2000]

all cards sync'd together from the first sample, but with different sample rates 100kHz for the analog, 2MHz for the LVDS.  I have a PXI-8106 controller in a PXI-1045 chassis.

[Andrew McL]

Hi bmann2000,

I think what you would need to do would be to synch all of the cards to a common clock. I would look in the NI example finder for the Hardware Input and Output->DAQmx Examples-> Synchronization ->Multi-Device. These give some good examples of various different ways to synch devices. I would then suggest that you set the AI reference clock to trigger acquisition from the Digital boards. This should allow everything to be synchronous (between the two different clock rates) and triggered to start at the same time. 

If you would like further examples or a better explanation, please let me know,

Thanks,

[bmann2000]

I would be interested to see any examples you have access to, showing DAQmx and HSDIO cards synchronized together.  6123 boards have an onboard timing source, 6561 boards have an onboard timing source, the PXI chassis has a timing source.  In my app, 6561 samples at 2MHz, 6123 at 100kHz, the solution must allow both cards to synchronize with each other and maintain their respective sample rates.  I have attached a VI, this shows how I've generated 2MHz from the 100kHz on the 6123 using counters, if I could TClk the whole lot together it could work.  (LabVIEW 8.5, HSDIO drivers required)

[Steve_B]

Hi bmann2000,

I think that this KnowledgeBase may provide some additional insight into your HSDIO synchronization questions because it addresses synchonizing HSDIO with different devices. There is also an example for synchronizing an HSDIO generation with an AO generation in DAQmx. You may find this helpful for getting started with your synchronization. I would recommend getting one HSDIO device and one DAQ device synchronized and then expanding the program to include your additional boards because it is simpler to synchronize multiple boards of the same device.

Synchronization with a High Speed Digital Input/Output (HSDIO) Board
https://www.ni.com/en/support/documentation/supplemental/14/hsdio-generation-and-acquisition-synchro...

Synchronized High-Speed Digital Output and DAQmx Analog Output
http://zone.ni.com/devzone/cda/epd/p/id/2963 

[Steve_B]

Hi bmann2000,

I also wanted to let you know that the 6123 will not be able to PLL to the 10MHz clock in the PXI chassis. The 6115 and 6120 are the only S Series cards that will be able to do this. You should share a timebase between the devices for synchronization. Another thought would be using a timing and synchronization card such as the 665x series to generate a trigger to all devices through the PXI Star lines. You can see more information about the S Series PLL to clock 10 in the linked KnowledgeBase and there is additional information about the PXI Star lines in the PXI-6653 User Manual on .pdf page 27.

Can a S Series Board Lock its Timebase to the 10 MHz Clock on the PXI Backplane?
http://digital.ni.com/public.nsf/allkb/6331133B8FF30280862570380067B245?OpenDocument 

NI PXI-6653 User Manual
https://www.ni.com/docs/en-US/bundle/370968a/resource/370968a.pdf

[bmann2000]

Sharing a timebase does seem to be the logical solution, but implementing anything not in the shipped examples is very difficult without a detailed knowledge of the hardware, associated drivers, pxi standard, device history, exceptions etc.  I've studied the links and the example VIs.

Example VI hsdio_daqmx_sync.llb, it appears the daqmx card and the hsdio card only share a StartTrigger, no actual synchronisation.  I still can't find an example that demonstrates synchronisation between a DAQmx and HSDIO card.  I'm not certain if it's even possible.

If I could export a clock from the 6123 to the 6561, or vice versa, I'd have a solution.  I've studied all the examples available but still can't find the actual coding method to achieve the link.  I've attached my latest code with comments and error messages.  I think I understand what I'm trying to achieve, but the coding has turned into trial and error.

[Hillman]

Hi All,

I have taken up looking into this issue in the UK Office, by working with Brian - I will post the soltuion.

Kind Regards,

[Hillman · Accepted solution]

Hi All,

I just wanted to post the summary:

In order to syncronize, you must share a sample or reference clock. With the HSDIO as the master, you cannot share this except using the ClkOut Smb connection, the trigger lines cannot be written to in a way the S Series can recieve them.

Using the S Series as the master, you can easily generate a 2MHz clock signal using a counter output task. This signal needs to be routed to the HSDIO device. This can only be done using an external connection (ClkIn smb connector or the Strobe line), since the S Series card cannot write to PXI_Trig7 or the PXI STAR line (The HSDIO device can accept Sample Clock signals on ClkIn, PXI STAR, and Strobe; it can accept Reference Clocks on ClkIn, PXI_CLK10, and Trig7).

See the attached example I created to do just that. 

I realize that using external connections may not be the most preferred solution. One other idea we had is that it is possible to use a generation task in conjunction with script markers on an HSDIO device in order to effectively generate the 2MHz clock that can be shared over a PXI_Trig line. This can then be divided down on the S Series boards to be the AI sample clock.

Kind Regards,

James Hillman 

SR: 721280