Hi All,
I wanted to explain a little more about the script marker solution: Thanks you US Team!
During scripted generation we can output
markers on specified samples of output. These markers can be sent out
over PXI_TRIG lines. We could build a script that output markers
periodically to form a clock type signal. These same PXI_TRIG lines
are valid sources for analog input sample clocks (and counter inputs if
we need to divide down the 'marker clock') on the S Series cards.
Since
we can have simultaneous generation and acquisition tasks on an HSDIO
card, we could have a "dummy" scripted generation task with periodic
markers. This task's sole purpose is to output, on the PXI backplane, a
sample clock to be used by other cards directly, or a reference clock
to be divided down by other cards for their use.
One of
the major caveats comes into play because we have to use onboard memory
for this dummy task and the longer this "marker clock" must be output,
the larger the block of onboard memory must be used. So if all channels
on a card were being used for a continuous acquisition, we could run into problems.
Kind Regards
Kind Regards
James Hillman
Applications Engineer 2008 to 2009 National Instruments UK & Ireland
Loughborough University UK - 2006 to 2011
Remember Kudos those who help! 😉
