time elapsed between two counters on LabView FPGA

[kodj]

Hi guys,

 i am working with cRIO 9073 and new to labview programming. I have implementeed counters on FPGA  vi and would like to measure period between two pulses. How can I measure the time between two counters on Labview FPGA vi? Here is screenshoot of FPGA vi (pfga-diagram). Please let me know

Kodjo

.NEt software developer 

[crossrulz]

I normally do something like this.  I use a Timed Loop instead of the While Loop.  In LabVIEW FPGA, we call this a Single Cycle Timed Loop because everything inside of the loop must execute in a single clock cycle.  I am assuming you are using a digital input that can handle the 40MHz.  I use a Feedback Node instead of a Shift Register for the previous state of the digital input since I think it is a little cleaner.  Then I increment the count (stored in a shift register) when a rising edge is not detected.  When the rising edge is detected, I write the count in the front panel indicator (for the RT to read) and reset the count.  I typically just let the RT do the math to convert the number of cycles into seconds, Hz, or whatever you are getting out of this counter.

[kodj]

Please,Can you attach the FPGA vi code I am having trouble finding items from toolbox?

thanks

[crossrulz]

What I attached previous is called a Snippet.  Save the image file to your desktop and then drag it onto your block diagram.

[kodj]

I run to some issue, I am not getting  a display of counters continuously. I am using a rotational machine which generate pulses. When the machine runs no display of counters appear on my labview front panel. And when I turn off the machine the total number of counters appear. I am wondering if it is related to debouncing signal or I have some issue with my setup of hardware?.

Thanks

Kodjo

.NET software developer

[natasftw]

You likely have the indicators outside of the loop so they don't update until the loop finishes.  In text-based, that's like doing:

int i,j = 0

while (i < 10) {

j++

}

print j

Would you expect to see a print of 0123456789 or just 9?

[crossrulz]

In the FPGA code I gave you, the counter only updates on a rising edge (cycle is complete).  From your description, this is not where the error is.  So you will need to share your RT code if you want us to help diagnose your issue.