LabVIEW

cancel
Showing results for 
Search instead for 
Did you mean: 

what's difference choosing between PFI4 and CTR1 Gate

Hello All,
  Merry Xmas to you guys first.
  i am using counter in my vi attached. I inject a pulse train into PFI4/CTR1 Gate pin (no.41) of my E serial DAQ-CARD.
  The question is how to choose counter0 sampling clock signal. if I choose "CTR0 gate " from the list (with filtering option off), there's an error when run the vi says "Error 200326-attemp to perform a route when the source and destination are same". But I choose "PFI4", the vi runs well.
  So I am confused about the options. I thought they are same things as they both refer to one physical pin.
  Any explanation?
 
Thanks
 
Feilong 
0 Kudos
Message 1 of 2
(3,185 Views)
Hi Feilong,

Merry Christmas to you too!

From looking at your VI, it appears that you are trying to do a buffered event count with an external clock.  As such, using the DAQmx Timing VI as you are doing is correct.  Here's the full dialogue for the error that you are getting:

"Error -200326 occurred at DAQmx Start Task.vi:4

Possible reason(s):

Measurements: An attempt has been made to perform a route when the source and the destination are the same terminal.

In many cases, such as when configuring an external clock or a counter source, you must select a PFI, PXI Trigger, or RTSI line as the source terminal.

Source Device: 6036E
Terminal: /6036E/Ctr0Gate
Destination Device: 6036E
Terminal: Ctr0Gate
Channel Name: 6036E/ctr0"

When configuring the buffered edge count task, the driver already knows that the sample clock will be the internal counter gate terminal.  The default counter 0 gate terminal on the device is pin 41 (also corresponding to PFI4), but you can actually use other PFI lines (physical pins) on the device for the counter gate as well.  The timing VI is essentially creating the route from a PFI line to the internal gate terminal to satisfy the requirements of the task.  By specifying "Ctr0Gate" as the source of the sample clock, you are trying to route the gate terminal to itself (please note the text I have bolded in the error code message).  In addition, you can refer to the "Device Routes" tab in MAX to see that routes from PFI lines to the Ctr0Gate terminal are allowed, whereas a route to itself is not:



A couple of side notes about the code that don't affect the functionality but will make your code more standardized and maintainable:
1.  Use standard while loops vs. the timed loops for standard applications that aren't used in a real time environment.  If you need a reference, please take a look at the shipping example "Count Digital Events-Buffered-Continuous-Ext Clk.vi".
2.  Wire error clusters all the way through, merge them at the end of program flow, and handle the errors with an error handler (the simple error handler is sufficient).  Also refer to the shipping example to see how this is done.

Regards,
Andrew W
National Instruments





Message Edited by TheWoost on 12-26-2007 03:44 PM
0 Kudos
Message 2 of 2
(3,166 Views)