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what's the FPGA step size and how to calculate it?

Hi there,

 

I inherited an vi with problem in it. It's basically reading the binary file then display it. So the vi reads the binary file by using Read From Binary File, the output data from this function then sends to FPGA after multiply a number (32767/10). But unfortunately I got a wrong output. The final output value for some reasons looks got attenuated. People told me maybe it's related to the FPGA step size, so I want to know what is the FPGA step size and how to calculate it. Can someone answer my questions here?

 

Thanks in advanced!!!

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Code partially attached

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Who are the "people" who think it's a problem of FPGA step size?  I have no idea what they mean by that term.

 

What result are you getting, and what result do you expect to get?  How do you know it's wrong?

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Hi Weny,

 

It sounds like you are trying to find out the output resolution of your FPGA module.  It would be helpful if you provided what FPGA module you are using in your tests so we know what information to provide.  For instance, the R Series Manual provides information on how to calculate the required DAC output code to generate the desired output voltage.  You should also try to keep the accuracy of your device in mind.  The analog output signal you are generating will be subject to gain, offset, and noise errors.  You can use the specifications sheet (such as the R Series Specifications) of your device to determine what accuracy your board will have.  The specs also provide information on the resolution of the board.  You can search ni.com for the manual and specifications for your particular device if you are not using R Series. 

Regards,
Browning G
FlexRIO R&D
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The module I have is NI 7833 R.

 

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weny:

 

How is the output not what you expect? Is it simply attenuated? What's the expected output, and what is the actual output? Is it possible that your desired output exceeds the maximum analog output voltage?

Caleb Harris

National Instruments | http://www.ni.com/support
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