08-05-2005 06:07 AM
08-08-2005
11:57 AM
- last edited on
04-17-2024
08:18 AM
by
Content Cleaner
Hi Murali,
No, an FPGA application that uses the R Series boards cannot be programmed in CVI (at least not directly). In general, VHDL code may be imported in LabVIEW FPGA using the HDL node, so If you had some C -> HDL translator utility you may be able to use CVI, then using the translator generate to generate the HDL code, then import that with the LabVIEW FPGA "HDL Node". But you would need both CVI and LabVIEW FPGA (and a way to translate the C code to VHDL). So this round about way is certainly not recommended. The R Series boards are intended to be programmed only with LabVIEW FPGA.
As for the differences between the three boards you mentioned (6704, 6602, and 7831R):
1. The 6704 is an analog output board, programmed with the NI-DAQmx driver (which is very easy to use, both in CVI and in LabVIEW). The specs for this board can be found at the following link: https://www.ni.com/en-us/shop/model/pxi-6704.html
2. The 6602 is a counter/timer board, also programmed with the NI-DAQmx driver. The specs for this board can be found at the following link: https://www.ni.com/en-us/shop/model/pci-6602.html
3. The 7831R has multi-function I/O (analog and digital), and is programmed in LabVIEW FPGA with the NI-RIO driver (not availabe in CVI). Because the on-board FPGA of the 7831R is reconfigurable, it can be used for very customized applications such as (1) complete control over the synchronization and timing of all signals and operations; (2) user-defined onboard decision-making logic; and (3) digital lines individually configurable as input, output, counter/timers, PWM, flexible encoder inputs, or user-defined communication protocols. More information on this board can be found at: https://www.ni.com/en-us/support/model.pci-7831.html
Hope this helps!.
Regards,
Jeff M.
Applications Engineer, National Instruments
09-29-2008 07:05 AM - edited 09-29-2008 07:06 AM
I am in a similar boat as mdontaraju. I have one of NI's Rio FPGA boards. I plan to program it with VHDL + Labview FPGA. However, our test set software is written with LabWindows. I think I understand how to interact between a FPGA VI and Host VI. I do not understand how to interract between an FPGA VI and LabWindows. Do I need to create a Host VI as a "wrapper," and then use Labwindows to talk to the Host VI?
10-01-2008 05:03 PM
That would be the way I would go about it.
TomC_NGC wrote:Do I need to create a Host VI as a "wrapper," and then use Labwindows to talk to the Host VI?