PCI device driver development in CVI for RT OS

[Din-o]

I'm writing a driver for a PXI card that uses the 9030 bridge chip for PCI access. This device needs to be used with the national Instruments( NI ) Labview real time OS( LV RT ) in a PXI instrument rack. I have the WIN32 API driver code for the card and need to redevelop it for LV RT. I need assistance in the following area: How do the VISA calls to access Configration space and BAR0 -BAR5 space map to PLX IOPsace0-4  and the PLX registers on the 9030 chip. In other words; how do I translate a call in the current driver, lets' say for example a write to an offset into IOPspace1, to a call that writes to an offset into a particular BAR0-5 space ? Or how I translate a call in the current driver, lets' say for example a write to an offset into a PLX register( PlxRegisterWrite(...) ) into an offset into a particular BAR0-5 space. I can state the following facts: I can successfully  read the PCI configuration space registers using the VISA API ; the VISA API tells me that BAR1 is configured for IO access with a space of 0x80 bytes; the VISA API tells me that BAR2 and BAR3 are configured for memory access with a space of 0x1000 bytes. Does this mean BAR1 translates to PLX register data, and that BAR2 and BAR3 are equivilent to IOPspace0 and IOPspace01? What's the difference between a BAR space being configured for memory access, and a BAR space being configured forIO access?

 Having these cards work in the LV RT OS will be a huge selling point for NI PXI.

Thanks for any assistance you can provide.
Regards- Dean

[Wendy L]

Hello Dean,

After reading your question, I know you mention LabVIEW RT, but the title of this post mentions CVI.  So are you planning on using CVI / CVI Real-Time and VISA to access the memory space of your PXI card, or are you planning on using LabVIEW and LabVIEW Real-Time? Note: Both CVI Real-Time and LabVIEW Real-Time use the same RT OS and VISA calls.

[Din-o]

Hi Wendy,

Thanks for the response.

> So are you planning on using CVI / CVI Real-Time and VISA to access the memory space of your PXI card, or are you planning on using LabVIEW and LabVIEW Real-Time?

Both; I'm writing the driver in CVI as a dll to be callled from labview, which will be deployed on the RT OS. The dll will be compiled with real time target settings and the labview wrappers will be built for a realtime target. So far I've been very succesful in getting all of that to work. I have dll fucntions that use VISA routines to read the boards registers in the PCI configuration space, and they all work fine. My trouble was figuring out what resgisters to access, to get the same functionality of the windows driver( I have the source code ). But I believe I've figured it out; after my post, I was able to get a hold of the 9030's ( the PCI bridge chip that the card uses ) hardware reference manual, and it seemed to answer most of my questions.

Thanks, -Dean

[Din-o]

Hey Wendy, another quick question.

Do you know what it means( i.e. the ramifications for doing soemthing like what I'm attempting ) for a PCI memory space to be configured as I/O versus memory ?

[SimonH]

Dean,

In my (very basic) understanding of the PCI specifications there is no particular difference between I/O space and memory space on a PCI device.  The difference is the PCI bus commands used to update the different memory spaces.

You said you had the source code to the WIN32 API driver.  Is there any indication in there as to which configuration is more appropriate?

Regards,

Simon H
Applications Engineer
National Instruments
http://www.ni.com/support/

[Din-o]

Hi Simon,

I found out from PLX what the difference is; you're right, it's the command used. They recoomend using the memory space, it's simpler to write code for - just access the memory space like normal; and that's the way I did it. BTW, I found out my intuition was correct; BAR0 and 1 are for accessing the 9030 chips internal registers and BAR2 and 3 are for accessing the DG-101's registers. I got the driver working nicely now. The only thing I have left to do is write the code to read the seial eeprom.

Thanks for the response, -Dean