1424 Timing Information

[elcankev]

I have read some of the posts on here and don't have the luxury of time here. So I will post this and see what I can get. I am using PCI-1424 with a ccd camera designed by myself. The design is based upon Kodak's KAF-8300 reference design. I am using their camera file. I have maintained the logic fucntionality for the Frame Enable and the Line Enable. I am supplying a 25 MHz pixel clock from the camera to the 1424. It appears to aquire an image but all data is "0" looking at the data external to the frame grabber I know it is not zero. So I believe I have a timing issue  between the data and possibly the pixel clock. I am looking to find out the setup and hold times for the data with respect to pixel clock, frame enable and line enable. If anyone has any experience with setup on these boards please offer some help. All of the literature here suggests that NI wants to keep all of the details to themselves which in my opinion doesn't make sense. I am develping a camera for a custom system. I want to use the frame grabber here to do tests on it. So I want simply aquire images with the board to test my custom camera. I am not interested in buying someone elses camera I just want to aquire images from mine.

Help!

[seVEMes]

What have you done to verify that the data is not zero?

[Brad]

Make sure you are sampling the data on the correct edge of the pixel clock. Also make sure the signal type (TTL or LVDS/RS422) corresponds to what the electrical level of the signals from the camera actually are. Does the image size and frame rate correspond to what you'd expect? If so, I'd say one of these two issues is happening. Also make sure if the signal is RS422 or LVDS (both of these are differential), that you wire the positive and negative ends of your data signal correctly. If the signal is TTL, make sure you correctly ground your camera to the ground of the board and just wire your data signals to the positive ends of the data lines.

Hope this helps,

Brad