I am new to PCI Express. Could someone please explain to me how slow back end applications should interface to the PCI Express bus. We have bought a PLDA core that appears to do writes to the backend logic in Burst mode @125MHz. At the same time it expects the read cycle from the back end logic to be taken care of with a DMA access ! What is the best way to manage these types of accesses ? We need to interface this bus to a Dual Port Ram that runs at 20 Mhz.
How do other applications handle this type of speed ? Do all applications that interface to the PCI Express bus use DMA and Burst mode types of accesses ?
Is there anyway to forces the PCI Express accesses to do single address accesses ? (Yes I know this will slow things down a lot !?) Or is the nature of PCI Express only ever to do high bandwidth accesses which can only be implemented through DMA and burst modes ?
