DC offset at beginning

[nirvtek]

Here's a screenshot with the vertical scale.

[johnsold]

Certainly the capture code should be checked.  It is clear that some data is missed.  Try feeding a lower frequency signal in to see if you can figure out how much is missing.

Other observations:

1. The two channels appear to shift in opposite directions. The sinusoidal signal has an upward shift while the DC signal has a downward shift.

2. The sinusoid before the transistion does have a DC offset: top peaks have amplitude ~7.8 above zero while the bottom peaks are at ~-7.1.  After the transitions the offset seems to be gone.

3. Is it possible that the DC channel has an input signal which is beyond the common mode range for the input (+/-10 Vpk)? I have seen devices where an out-of-range input can cause strange and undefined behavior.

Lynn

[nirvtek]

I increased the capture buffer size to 1 MS and set the number of samples to read to be -1 (as much as is available) and it appears to be working fine without DC offsets or amplitude shifts.

The post-processing code actually has a fixed buffer and averages cyclicallym i.e. once it reaches the end of the buffer it wraps back to he beginning. There also doesn't appear to be any missing samples anymore.