Hardware-timed Analog output with PXI 6733

[labJunky]

Hello,

I am a little confused about the possibilities for hardware timing an analog output from a PXI 6733, using DIO pulses from a separate device.

I would like to generate an analog voltage on the timing signal of another device.

Lets say I want to generate voltages: 0, 1.3, 8, 0 volts. At times 1 us, 402 us, 1004 us, 1503 us. (us = micro seconds). I have DIO card that will generate TTL pulses at these times, and lets say I input these on a PXI trigger line, or PFI line into the 6733 card.

How do I configure DAQmx using labview to perform this task?

Thanks,

Paul. 

[Now_With_Underscores · Accepted solution]

Hey Paul,

There are many ways we could achieve this.  The first thing that came to mind is to make the AO sample clock the TTL from your device.  All you need to do then is make an array of doubles with the values you want to cycle through and then then each time you get a clock pulse we'll update the output.  You can view examples in LabVIEW by going to Help >> Find Examples.  The NI Example Finder will popup, and you can find many helpful programs in the Hardware Input and Output»DAQmx»Analog Generation»Voltage Folder.  To achieve my method, I opened the Cont Gen Voltage Wfm-Ext Clk.vi example and modified the code as described.  I've included the code here for your reference.  In my code, I plug my external clock into the clock source via PFI0 on my card.  Now, whenever I receive a pulse I will update the output voltage from 1 to -2 to 3 to -4, back to 1 to -2, etc, ad infinum.

[labJunky]

Hi John, thanks for your reply.

I was confused with the terminology. Since I assumed that a sample clock must be a periodic series of pulses. I guess I thought that there would be a phase-locked loop and if my clock pulses where not periodic with a specified rate, it would generate an error.

 Thanks for clearing that up!

Could you provide your example in labview 8.5 format, since I don't have labview 8.6 at the moment. 

Thank you for your help,

paul. 

[Now_With_Underscores]

On most cards that support PLL, our clock has to be either 10MHz or 20MHz.  When we assign an external clock to a PFI line, the clock can be irregular.  On M and E series boards there is no minimum frequency (most S series boards have a minimum acceptable frequency).  Here's the same code for LabVIEW 8.5.  Let me know if you have any questions!