Multifunction DAQ

cancel
Showing results for 
Search instead for 
Did you mean: 

How do you set up synchronous AI AO with different sample rates?

Solved!
Go to solution

Synchronous analog out and analog input, modified from NI's example, results in noisy input if the sample rates are not the same for AO and AI. What alternative will prevent the noise from being added to the AI? I'm using LV 8.5, PCI6251.

 

The sample program is attached, and representative screen shots showing the increase in noise when the sample rates are different.

 

Thanks

0 Kudos
Message 1 of 5
(4,017 Views)

Hello Dekay,

 

When directly connecting the AI to the AO and sampling in this way, you may often see the effects of glitch energy on the AO lines. There will always be some glitch energy when the AO updates, so depending on when you sample, you may sometimes catch that glitch energy in the sample.

 

In the example of sampling at 500 kS/s and generating at 400 kS/s, you can clearly see that the extra noise is periodic, and zooming in on the graph shows that the spike occurs on every 5th sample, since this is when the AI and AO clocks align in time. Conversely, sampling at 400 kS/s and generating at 500 kS/s will cause the glitch to appear on every 4th sample.

 

Are there specific rate you are needing to go at? The problem seems to happen when an AI sample is taken within about 500-600 ns of when the AO updates. Thus, there may be some rates that can be chosen, combined with different Delay from Sample Clock values for the AI that will reduce the chance of picking up these glitches.

 

Hope this helps,

Daniel S.
National Instruments
0 Kudos
Message 2 of 5
(3,976 Views)

Daniel -

Are there glitches even when the voltage output is not changing? The AI is taking place after the pulse, when the voltage should be steady.

Thanks

0 Kudos
Message 3 of 5
(3,964 Views)
Solution
Accepted by topic author Dekay

Hi Dekay,

 

Unfortunately, because we are performing a clocked generation, the glitches will be present because a clock signal is sent to the DAC every sample, despite the fact that it is not changing the value that it is updating. Is it possible to decrease your update rate to be as slow as the pulse width (or whatever your shortest amount of time is to be high or low) to minimize how many glitches occur?

 

Also, as I mentioned in my post above, depending on what the rates are, there is a timing property node you can change (AI Convert.Delay from Sample Clock) to delay exactly when you sample from the sample clock edge. I placed the program in a loop, looped through different delay values, and was sometimes able to find points where the delay moved the AI sample far enough away from an AO update so that the glitch was not sampled, or at least was minimized. Hope this helps,

Daniel S.
National Instruments
Message 4 of 5
(3,941 Views)

Daniel -

I'll look into both decreasing the update rate, and sampling the input far from the AO update.

Thanks for the very helpful suggestions.

0 Kudos
Message 5 of 5
(3,939 Views)