I am using a PXI chassis with 10 6115's and a 6608 counter/timer. I need to use analog triggering on one of the 6115 AI channels. The particular channel will depend on the test setup, so I can't just pick one and hard-wire it. This analog trigger will be the master timing reference for all of the boards.
However, I need to trigger the 6115's at different times (e.g., trigger three at the same time and seven at some later time) so I'm routing the AI Start Trigger from whichever is the trigger channel (one of the first 16 channels) to RTSI0. The first five counters are then GATEd on RTSI0 and the counter OUTs are hardwired to the 6115's PFI0s in groups of two. So,
basically, one of the 6115s sends AI Start Trigger to the five counters which, in turn, generate five delayed triggers that are sent to the 10 6115's.
My problem is that I can't use a zero delay on the counter, so I can't get the 6115s to trigger at the same time, if need be. Whichever one generats the analog trigger will always be slightly ahead of all of the others that I would like to trigger at the same time.
So my question is this: can I somehow force one of the 6115's to generate the AI Start Trigger across RTSI0 but not actually trigger itself until it gets the trigger back from the counter/timer? This way, the delay will still be there but all of the boards can get a simulataneous trigger if need be.
Thanks,
RGA
