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Misunderstanding DAQmx timebase divisor, the sequel

I'm trying to use an external clock (typically 80 kHz) as my AI sample clock timebase with a PXI-6250.  I call DAQmxSetSampClkTimebaseDiv to tell DAQmx to divide this clock down to my desired sample rate, like so:

 DAQmxCfgSampClkTiming(taskHandle, "OnboardClock", 80000.0, DAQmx_Val_Rising, DAQmx_Val_ContSamps, 100000);

DAQmxSetSampClkTimebaseSrc(taskHandle, "/PXI2Slot2/RTSI2"); // my external 80 kHz clock comes in on RTSI2

DAQmxSetSampClkTimebaseDiv(taskHandle, 80000/sampleRate); // sampleRate is in the range 1 kHz .. 40 kHz

 

There is similar code in the forum thread "Misunderstanding NIDAQmx Timebase Divisor."  It works fine for sampling rates up to 5 kHz, but if I try to specify a higher rate, say 8, 10, 20, or 40 kHz (i.e. timebase divisors of 10, 8, 4, or 2 respectively), it behaves as if the sample rate is "maxing out" at somewhere between 5 - 6 kHz per channel, no matter what timebase divisor I specify.  There are no errors returned, but I never get more than around 5600 samples/sec/chan.  What am I doing wrong?  Thanks, Larry

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Once again, the mysterious "smiley wink" crept into my post -- that should be a right paren.

 

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Larry X,

 

The help on SampClkTiming says: To use the internal clock of the device, use NULL or use OnboardClock.  Why are you setting it to OnboardClock?  Can you explain why you have done this?

 

If this is not the problem can you use the clock not divided down?  Or is it still capping at 5-6khz?

Sincerely,
Jason Daming
Applications Engineer
National Instruments
http://www.ni.com/support
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If you read the old thread "Misunderstanding DAQmx timebase divisor," user "reddog" specifically said that you have to use the external clock as the sample timebase for the onboard sample clock in order to be able to use the timebase divisor to divide the external clock frequency down to the desired sampling rate:

 

Notice I changed the clock source in the DAQmxCfgSampClkTiming function from "PFI0" to "OnboardClock". If you leave the source of the sample clock as an external clock, you'll bypass the use of the sample clock timebase and you still won't be able to divide down your signal.

 

If I specify my external clock that's coming in on RTSI2 as the sample clock (not the sample timebase), then how do I divide my clock down to the desired rate?  My external clock is at a fixed frequency, but within my app, I need to be able to specify any sampling rate that's a divisor of the external clock rate, e.g. for an 80 kHz ext clock, sampling rates of 1, 2, 4, 5, 8, 10, 20, or 40 kHz per channel.

 

Thanks,

Larry

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LarryX,

 

I tried to duplicate this problem and failed to.  I used the Acq-ExtClk sample code and then pasted in the code you used (making minor mods like changing divisor to a 2 rather than a forumla as I don't have the rate box you have).  It seemed to work fine.  Do you think you could try this?  How are you error checking?

Sincerely,
Jason Daming
Applications Engineer
National Instruments
http://www.ni.com/support
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