Hi jfh,
I believe this is the same question we talked about over email, correct? While you are reading my reply, I think I will go ahead and post it here too for the benefit of others. Have a great day!
Your second description is the way it works. You are correct about the
disadvantage of the first example. If you are interested in the phase
relationship between signals, method 1 is pretty worthless. The reason why
the second method is used is because there is only 1 ADC on the DAQ board.
(You can buy DAQ boards with a dedicated ADC for each channel such as our
611x series simultaneous sampling boards, but this adds cost to the board.)
There are
two clocks involved in the scan. The STARTSCAN clock and the CONVERT
clock. The STARTSCAN pulses once for every scan. (A scan means that every
channel will be sampled once). After the STARTSCAN pulse, the CONVERT
signal will pulse once for every channel in the scan list. (An A/D
conversion will occur for each of these pulses) Note that the Convert*
signal is active low. (A high to low transition samples a channel)
By default, the CONVERT signal is to the maximum sample rate of the board.
This means that if your scan rate is very low, the channels will be scanned
all very close together. The ADC will then wait and do nothing for the
remainder of the scan period. This is useful because it helps preserve the
phase relationship between channels. As you put it, you could measure the
voltage and current of the same signal and the data would be pretty
meaningful. Sometimes I've heard this called psuedo-simultaneous sampling.
As you can see, as the scan rate increases (the STARTSCAN period gets
smaller) there becomes less of a delay from between the last channel is
sampled and the first channel needs to be sampled again.
--Russell
Applications Engineer
National Instruments
