Buffered digital I/O is possible with the PCI-6025E. However, the digital functionality on this board is provided through two different digital I/O chips. The first 8 lines (Digital Channel 0) are provided by the DAQ-STC digital and timing controller. These lines are only capable of programmed I/O. In other words, the lines are updated by software calls. The last 24 lines (Digital Channels 2, 3, and 4) are provided by the 8255 chip on the board. These lines are capable of both programmed I/O and handshaked I/O.
From your description, it sounds as though you would like to perform pattern I/O. That is, you would like to be able to output a buffer of data at some pre-determined, hardware generated rate. The 8255 chip on this board does not directly support
pattern I/O in that it cannot generate its own clock signal based on the pre-determined rate desired. It supports handshaked I/O where data is output/received based on external signals. For a complete definition of handshaking, you can refer to:
support.ni.com/daq/devices/6533/defs.htm
The generation rate must be externally clocked on the REQ line on the chip.
In order to setup handshaking on this board, you must use the DIO Group VIs instead of the DIO Port VIs. The DIO Group VIs provide a way to configure a buffer of data and output it. For an example of how to do this, you can refer to the 8255 PPI digital examples that ship with NI-DAQ for LabVIEW. Specifically, you will want to look at the Digital Buffered Handshake I/O examples for the 8255.
Regards,
Erin