06-02-2008 05:31 PM
06-03-2008
02:19 PM
- last edited on
08-06-2025
11:22 AM
by
Content Cleaner
Hey Dave,
They error that you are receiving indicates that the counter buffer is overflowing. The specs for the 6259 indicate that the counter FIFO can only hold 2 samples. This means that as soon as the counter data is put into the FIFO, we need to immediately transfer it to the PC buffer. It looks like when your application runs the counter VI on its own then it can meet these requirements, but when you additionally perform Analog Output operations then there is not enough PCI bandwidth to transfer the data from the counter FIFO fast enough and the overflow occurs.
You may be able to avoid the error by decreasing your sampling rates. Really anything that will decrease the use of your PCI bus time will help the performance. Do you have any other PCI cards in the computer that you could remove?
NI 6259 Specifications
https://www.ni.com/docs/en-US/bundle/pci-pcie-pxi-pxie-usb-6259-specs/page/specs.html
Please let me know if you have additional questions.
Message Edited by Chris_D on 06-03-2008 02:19 PM
06-05-2008 09:49 AM
06-05-2008 10:48 AM
06-06-2008 01:18 PM - edited 06-06-2008 01:20 PM
06-09-2008 04:32 PM
06-10-2008
06:16 PM
- last edited on
08-06-2025
11:22 AM
by
Content Cleaner
Hey Dave,
It looks like I was mistaken and the limitation is not with the PCI bandwidth, but a hardware limitation with STC timing chip. Knowing this, there still seems to be something fishy going on with your application. Your device should be able to perform at about 380 kHz. I was able to reproduce similar results with my 625x device.
When you say 1 uS I am assuming you are meaning a sample rate for your buffered counter input is 1 MHz. Are you sure this is correct? The benchmarks and my tests indicate that you shouldn't be able to achieve near this rate.
It is still very strange that you get the error just doing a simple AO with MAX. Have you tried testing with any of the example programs? This would ensure that we are using the same software in our tests. I am using the Count Digital Events-Buffered-Continuous-Ext Clk.vi. Since we have now determined that this an issue with the STC chip this would explain why it still generates the error even when you write the waveform to memory before starting the counter VI.
We also may want to try testing with a continuous 100 kHz sample clock source from your counter rather than one that creates 500 pulse every 20 Hz. In my testing, I saw the error when changing the rate of my sample clock and am wondering if you may be seeing something similar.
To really solve this issue we need to step back and take a look at the big picture. What is your requirement for this application? Will a slower rate be sufficient or are you just curious to cause of this error? Could you use polling instead of buffering? Would you consider a different device with larger FIFO?
06-11-2008 04:23 PM
06-12-2008 05:57 PM - edited 06-12-2008 05:58 PM
06-13-2008 06:27 PM