08-04-2011 01:55 PM
Multisim 11.0.2 Full edition.
I was in the process of entering a moderately complex circuit for analysis. The first part of the circuit involved 2 AD8512 dual opamps. My analysis was such that I could enter part of the circuit, simulate, then proceed onto the next part. The first part was a single opamp and the other was unconnected. Simulation was fine. The next step was to add a log amp comprising two opamps. During this time I was relabeling the RefDes on all the parts to match the schematic. When I relabeled the Opamps, for some reason both devices would not change refdes. So I changed them all. When I tried to simulate, I got the error: Invalid subckt definition name 'ad8512_opamp_1. Due to errors, those devices were eliminated from the simulation. I figured it was my fault for changing the refdes, so I deleted the opamps and reinserted. Same problem. I also tried reloading the file and then, restarting Multisim. Same problem, same error each time.
Any clues to what the problem is?
Thanks...Steve
08-08-2011 11:13 AM
Hi Steve,
Is it possible for you to upload your circuit.
08-08-2011 11:30 AM
The new workaround is the same as the old workaround, replace the 8512 with the single amp 8510. Circuit then works. There was a different problem with the 8512 model in Multisim 10.
Circuit is attached.
Thanks....Steve
08-09-2011 10:27 AM
Hi Steve,
The issue here is not actually with the AD8512 it is with the DMMT3904W model.
There is a subcircuit call but no ending of that subcircuit using a .ends statement which is causing errors to propagate through the netlist making it appear as if the AD8512 model has an issue.
If you add the .ends statement to the model, the circuit seems to simulate fine for me.
08-09-2011 12:14 PM
Thanks, I'll check it out and report back what happens. This begs the question, why does that only affect the AD8512?
08-09-2011 12:27 PM
Sorry, but this is not working here. I added a .END statement to the end of the model, it shows up editing the part. Still the same error. I notice you said a .ends statement? I added the .END at the end of the whole model. Right place?
Thanks.... Steve
08-10-2011 08:53 AM - edited 08-10-2011 08:55 AM
Steve,
The .ends statement needs to have the "s" at the end as it implies the end of a subckt.
the proper format for your sub circuit would be
.subckt DMMT3904T2__DUAL_TRANSISTORS__1 1 2 3 4 5 6
* existing model data goes here
.ends
If you would like more information on this, search within the Multisim help for the spice reference, it explains the basics of spice programming for Multisim.
As for the reason only the AD8512 is affected if you view the netlist in Multisim (view -> spice netlist viewer) you will notice that the order at which the components are placed into the netlist leaves the DMMT3904T2 as the second last and AD8512 as the last model in the netlist. Because the DMMT3904T2 has no .ends statement, anything up until the .ends of the AD8512 is considered part of the DMMT3904T2's sub circuit which is why you are getting the netlist error.
Regards,
Jason
08-10-2011 09:45 AM
Okay, it's working now. It looks like the .ends statement has to be right on the next line after the model. If you put a empty line inbetween, it didn't seem to work yesterday. However, now I'm good to go, thanks!
Steve