Multisim and Ultiboard

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Multisim: Shifting Input Pattern -- Shift Registers, Tristates, JK Flip-Flops

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Hi everyone,
I have attached a link of a picture of my current circuit and my multisim file for those with multisim and provided links at the bottom.

How it is supposed to operate:
1-Some input pattern is set with the 4 switches on the bottom with keys 1-4 simulating a 1 or a 0 for each switch.
2-The space key is pressed to begin the circuits operation and set the SR latch to begin. Continued pressing of the switch will do nothing (that is required).
3-The tristates are enabled now, the bits are passed to the XNOR gates which compare the bits with the up-counting JKs.
4-Once the pattern of the input bits is reached, the 4-input AND gate goes HIGH, clocking the next JK, loading the Qs into the 1st shift register.
5-Buffers are used to allow the clear to be disabled on the first Shift Reg. and then clocked. Then the output of the first shift reg. goes to the second Shift Reg.
6-The output of the 2nd Shift Reg. is compared by XNOR gates and the probe goes HIGH.

My problem:
With certain input patterns (1111), it doesn't stop counting. With others (0110) it works fine.

Any thoughts?

Thank you.


Multisim File: http://www.drewcomputer.com/files/hw.ms9
Picture: http://www.drewcomputer.com/files/circuit.png
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