03-07-2008 04:24 PM
03-07-2008 04:48 PM
Try taking the clock pulses for the last to flip flops from "not Q" output of the previous ones. Apparently, what is happening is that these are being triggered on a rising clock pulse edge. The way you have them now, the first one will come up high trigger the second one and then the second one triggers the third one at power up. This allows all the leds to come on and when the next clock pulse comes around the first one will turn off while the others remain on. The next pulse switches the first on back on resulting in a high at Q which in turn turns number two off. This goes on this way throughout the count and is in essence counting down. I must say that this a very cool circuit they way it is working now and to come up with it by accident is truly amazing.
I hope this helps you get it the way you need it. You might want to save this ciruit as it is now because you may need a down counter at some point in the future and since you already have it you wouldn't need to "re-invent the wheel" again.
Very nice job on this circuit (even if it wasn't what you were shooting for)
03-07-2008 04:57 PM
03-07-2008 05:25 PM - edited 03-07-2008 05:26 PM
03-08-2008 09:18 AM
I have got the circuit counting by taking all the open pins and tying them back to VCC and placing a DGND on the schematic. I am still looking into the reset issue. So far I have not found a way of doing this yet. Like you said, every time I try to clear the three stages all the LEDs will freeze on and the circuit locks up and will do nothing from that point. I will continue trying various ideas and will get back with you when I find a solution. This may take a while so your patience will be greatly appreciated.
03-08-2008 03:26 PM - edited 03-08-2008 03:30 PM
Alrighty, I got it. I am going to post the schematic for you to examine. What I did was to look at the component information in the component properties dialog box. After examining the truth table for the IC I found that in order to reset them that CLR had to be low and PRE had to be high. In the original circuit when I tied all these to high all three LEDs came on indicating that all the Q outputs were coming up defaulted high. My thought process that if I leave PRE High and take the Q ouputs and invert them and feed that back to CLR then a reset could be accomplished. Since all three of them were high this indicated that binary 7 was being displayed. How to reset this after 6? I tried tying in a nand gate to the outputs of the last 2 thinking that it would display 6 and then reset. That was wrong. It counted to 5 and then reset on 6. This clued me in on what needed to be done. If it was reseting on the number you selected then in order to display the number you selected then you need to reset after that number which in this case would be 7. I then tied a 3 input nand gate to all outputs and now it will count to six and reset them on 7. This will allso automatically reset them to zero on power up.
I hope this helps. Here is the completed circuit:
03-09-2008 07:54 AM