New user ultiboard

[supsup]

Hi xaya

You don"t changed the trace width

[xaya]

Supsup,

Thank you for all the help. Do you think the errors I have  will prevent me from creating a Gerber file that is ready for prototyping?

Do you think they will effect the functionality performance of my circuit? 

Thanks,

Xaya

[supsup]

Wait one hour, please...

[supsup]

Hi xaya

Now errors are not present.

[xaya]

Supsup,

thank you again for all the help, I cannot open the file I am using Ultiboard version8

Thanks,

 Xaya

[supsup]

My file is created in 11 versions. Look at a file Nets.jpg - in it all nets and connections are drawn. Correct your the netlist.

[xaya]

Hi Supsup,

Thank you again for all your help, I was wondering if there is a way to add vias to the netlist?

[supsup]

To add vias to netlist it is not necessary - they are a part of a net automatically.