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Power plane error

Dear all,

I am working on a 4 layer board, and for some reason, Ultiboard keep flagging me with this warning The object "Copper Polygon: Width(10.0000 mil)Clearance(10.0000 mil) Net(0) " Is on a layer that is not allowed by the net settings

The object "Copper Polygon: Width(10.0000 mil)Clearance(10.0000 mil) Net(0) " Is on a layer that is not allowed by the net settings

And my VDD and GND net keep saying it's not connected.

I checked everything, the vias are there, and everything is there. I wonder why it's doing that. Maybe there is something wrong with my setup?

Kinda new to this software. Thanks

JON  
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Message 1 of 7
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Problem solved.
There is a routing layer in the net option, that's I enable all the layers and it works now.

JON  
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Message 2 of 7
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I get the same error. I don't fully understand your solution to this problem. Someone care to indulge me? I need some help.
____________
/Peter Hygren
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Message 3 of 7
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Hi Hygren:

For every net, you can specify what layers are permitted for routing. The DRC error means that the net is on a layer that the settings don't allow. You can modify the allowed layers in two ways.

1. From the spreadsheet:
Select the Nets tab and scroll over to the Routing Layers column. From there you can see what layers are allowed for the net (1 means allowed, 0 means disallowed). You can select the cell to change the allowed layers.

2. From the Netlist editor
Select Tools > Netlist Editor. For each net, select the appropriate routing layer on the Misc tab.

Garret
Senior Software Developer
National Instruments
Circuit Design Community and Blog

If someone helped you, let them know. Mark as solved or give a kudo. 🙂
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Message 4 of 7
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Thank you, I got rid of some of these errors by adding 1111 to all nets in the routable layers column. However some are still left, they are spread all over the 0 Plane (Ground).
The object "Copper Polygon: Width(0.254000 mm)Clearance(0.254000 mm) Net(0) " Is on a layer that is not allowed by the net settings.

I've attached my board file. Can someone please take a look?
____________
/Peter Hygren
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Message 5 of 7
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Nevermind, I threw it in the bin and started from scratch, now it works...
____________
/Peter Hygren
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Message 6 of 7
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I've figured out what is causing the error, although I'm not sure how you got into this state.

There is a power plane on the Copper Inner 4 layer, but this layer is not currently part of the design (which is why you can't remove it or see where the errors are coming from). As a workaroud, we can enable this layer, remove the power plane, then disable the layer.

1. Click Options > PCB Properties. Select the Copper Layers tab, then increase Layer Pairs the maximum (32 in this case). Click OK
2. Hide the Copper Top, BATPLUS, BATMINUS, and Copper Bottom Layers. You should now see the power plane on the Copper Inner 4.
3. Select and remove the power plane on Copper Inner 4
4. Click Options > PCB Properties. Select the Copper Layers tab, then decrease Layers Pairs back to 2.
Garret
Senior Software Developer
National Instruments
Circuit Design Community and Blog

If someone helped you, let them know. Mark as solved or give a kudo. 🙂
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Message 7 of 7
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