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Totally incorrect simulation of TTL level switching logic

So I added a Tiny Logic NC7ST04 to my Multisim schematic.

 

It doesn't simulate correctly a device with Vih=2V, Vil=1V.   It behaves just like a regular 5V CMOS part which is WRONG!

Your models really do need to allow for different logic switching levels.  Looking at your CMOS and TTL device selection in the database, it is pretty paltry - no 74AC, LVC, LVT, AHC, VHC and none of the models appear to specifiy the Vih and Vil information let alone Iol Ioh etc.

 

Not very happy bunny

David

 

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There must be some way to change this as the different logic families in the parts database switch at different levels (or are they fixed at Vcc/2) - though e.g TinyLogic_3V parts from the DB only output 3Vpp.  However there's nothing obvious in the part report to indicate this.

 

Dave

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Hi David,

 

I have the feeling your question/complaint is related to this: Making CMOS Output Voltage, VDD and VSS Equal in Multisim.

Extract from that page:

Multisim treats digital input and output as high or low behind the scenes, Multisim converts a high to the component default voltage level which in this case is 5V. By assuming a high is 5V, Multisim can simulate faster. If you want the CMOS components to use the VDD voltage: From the main menu select Simulate»Mixed Mode Simulation settings Select Use Real pin model.

Does this help you?


Ingo – LabVIEW 2013, 2014, 2015, 2016, 2017, 2018, NXG 2.0, 2.1, 3.0
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No, not really, it's to do with the input level at which the device considers it to be logic high.

 

For example 74HC logic typicall switches at about 2.5V, with a Vih level of about 3.5V.  OTOH 74HCT logic typpically switches at about 1.4 to 1.5V and the worst case level (Vih) is 2V.   For an MC74VHC1GT04, Vih is 2V (like 74HCT) for supply voltages of 5V and 4.5V, but is 1.8V for 3.3V supply.

 

So when I place a supposedly TTL compatible chip I expect it to switch at the "correct" voltage.  The devices in the Multisim database with supposedly TTL compatible inputs actually seem to switch at Vcc/2.

 

I guess I could sort of work round this by placing a device from (e.g.) TinyLogic_3V family and then using the what you describe to force the output to the Vcc level - this seems to be a "bodge" though espcially as a many devices the are in the _5V family are missing for the _3V family 😞

 

David

 

 

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I think I get your point. I know the different logic voltage levels, but never used Multisim for anything except CMOS.

 

Your main concern is that there is only a MC7ST04_5V although the real chip itself is a 0V..0.8V / 2V...Vcc one(*)? So there should be at least a MC7ST04_3V version on Multisim.

 

 

 

*: According to its Datasheet: NC7ST04 TinyLogic, HST Inverter

 

 


Ingo – LabVIEW 2013, 2014, 2015, 2016, 2017, 2018, NXG 2.0, 2.1, 3.0
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>our main concern is that there is only a MC7ST04_5V although the real chip itself is a 0V..0.8V / 2V

 

NO!  The real chip does run on a 5V supply its the switching level.

 

Dave

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Hi Dave!

 

I looked a bit deeper into the issue. Could you please tell me which Pin Model setting you used in your simulation? You can find this setting in the menu: "Simulate » Mixed-mode simulation settings":

multisim_2018-03-29_09-36-51.png

 

Using the "Real pin model" yields much better results for my simulation. The MC7ST04_5V switches at 1.5V; instead of at 2.5V when using the "Ideal pin model".

 

You can find detailed information on the difference between both modes here: Pin Model Implementation - Multisim help

Generally speaking, when using "Ideal pin mode", all logic devices would be expected to operate in "ttl mode", where 5V represent high, 0V is low and 2.5V is the expected transition state.

If you switch to using "Real pin model", simulation should more accurately reflect reality. Is this close enough for your needs?

 

 

Be aware that when you use real pin mode you do need to make sure you have the proper power rails on the circuit. It's not always the same for each component, you can see which you need in the Pins tab of the component properties:

2018-03-29_10-02-22.png


Ingo – LabVIEW 2013, 2014, 2015, 2016, 2017, 2018, NXG 2.0, 2.1, 3.0
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Thank you for that - it does look like it will work for me if the promise of your test holds good.   It would be helpful is this were clearly pointed up in the documenation, as the model gives NO clue about this, and TBH the help doesn't either. 

 

>when using "Ideal pin mode", all logic devices would be expected to operate in "ttl mode"

 

I think you meant CMOS mode there !

David

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Yes, you are absolutely right in all three!

 

Unfortunately I cannot edit my post, but at least I explained afterwards what I meant so someone reading only that part and not your answer can still figure out that something is wrong.

 

This is the correct version in case a moderator comes across this post: "Generally speaking, when using "Ideal pin mode", all logic devices would be expected to operate in "CMOS mode", where 5V represent high, 0V is low and 2.5V is the expected transition state."


Ingo – LabVIEW 2013, 2014, 2015, 2016, 2017, 2018, NXG 2.0, 2.1, 3.0
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