When will Multisim support RefDes with delimiters?

[RnDMonkey]

Many designers like to use RefDes to clarify a design and ease reading, such as denoting 3 capacitors in parallel that are meant to act as an equivalent larger value as C3.1, C3.2, and C3.3. Not every designer wants to use C3a, C3b, and C3c in that case. Also, some of us like to denote power rails as +12V, V+, or VCC+. This limitation is as annoying as 8.3 file naming limits. Does NI plan to support this in the future? If so, when? If not, why?

[kittmaster]

excellent question.....it is a major annoyance.

[david_c_partridge]

Not just components, but net names too!   I wanted to call a net ~CLOCK the other day - it wasn't having any of it!

Dave

[RnDMonkey]

Yes, net names should definitely be included! That way when you have your +12V source, you have your +12V net.

They should also add the ability to highlight entire nets via a right-click command, not just the spreadsheet. It should take the net trace and bolden it so that it stands out, not with just the hideous squares at the endpoints.