Word Generator bug?

[lectron]

I'm using the new digital_clock source to trigger a Word Generator bitstream.

When monitoring the output using a multi-channel scope, I can't see any difference in the timing of the triggering when I change between rising edge or falling edge external triggering. It always seems to trigger on the rising edge of the digital_clock.

I'm using Multisim 11.0.2, and have only connected (and entered data for) the least significant bit in the Word Generator.

Can anyone reproduce this behaviour or confirm this is a bug?

[derekdb]

Hi,

Would it be convenient if you upload your schematic so that we can take a better look at it? Thanks.

[lectron]

Hi Derek

   I've only got a screenshot of the circuit at the moment, as I've only got access to Multisim at college. I've uploaded the circuit here for you. Hopefully this is enough for you to recreate the circuit.

   If you set the cursor to the top data value, then run the simulation (looking at the oscilloscope), you'll see that the data is sent on every rising edge of the clock - regardless of the setting in the Word Generator.

   Let me know if this is enough information - I can always save the file next time I'm in college.

Thanks 🙂

[derekdb · Accepted solution]

Yes, it seems that you are right. It always triggers on rising edge no matter what. I will communicate with R&D about that issue and hopefully we will fix it in the later version. Thanks for pointing out that bug!

[lectron]

Thank you for looking into the issue - glad you could reproduce it, hopefully the bug can be fixed in a later version 🙂