01-18-2011 05:54 PM
Hello all,
I am trying to simulate a closed loop system in TestStand to validate our ECU software. I am wondering if this is realistic to do in TestStand.
This is what I am thinking. I have a computer connected to a NI FPGA card. The FPGA card is connected to the I/Os of my ECU, so I can send analog voltages to the ECU, and I can also see whether or not the ECU is commanding pumps to be turned on.
In TestStand, I call a Labview VI to read commands from the ECU through the FPGA. Then, I call another Labview VI with the plant model dll. The plant model calculates the new pressure and temperatures to be sent to the ECU. I get the FPGA to send the new voltages to the ECU. This, then, loops itself so I can get the dynamic behavior of this system.
Thanks.
Chase
01-19-2011 01:07 AM
01-19-2011 02:00 AM
01-20-2011 10:32 AM
Does this mean I need to buy new hardware as well. I highly don't think that my FPGA card can store a plant model.
01-20-2011 03:02 PM
Hi,
I would agree that you should check out Veristand first. You should also ask your local National Instruments DSM to help you figure it out.
Think of your FPGA box as an asynchronous instrument/process that TestStand can control at the level of
Load Model
Start/Stop Model
Read channels
Start/Stop onboard logging
Read back logged data after test
In your TS sequence you could set up other instruments, make calls to the HIL/RT/FPGA box, have the other instruments stimulate the ECU, send commands to the HIL to change stuff, clean up etc. I have some slides that show this configuration.
Normally you'd load the plant model onto the FPGA box, but run the model in LV Realtime on the micro, not on the FPGA, unless you had some super high-speed model. Maybe part of the model could run on the FPGA. Check out DSpace, they are pretty big in automotive HIL, you can get some ideas on how it would work on the LV RT/FPGA platform.
cc