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Pass/Fail execution not finish

Hello,

 

I have a problem. I have a sequence in teststand with one pass/fail step, and I call to a VI.

When I press run main sequence, it starts to run and not finished, it is running all time.

Why?

It isn't the first time that it occurs.

 

Thanks.

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Message 1 of 6
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Please provide more information, in doubt, add your code (sequence and VI).

I assume that your VI contains a loop which prevents the VI to finish by itself. TestStand is simply waiting for the VI to stop executing.

Norbert
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CEO: What exactly is stopping us from doing this?
Expert: Geometry
Marketing Manager: Just ignore it.
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Message 2 of 6
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Yes, I have a while loop in my VI.

 

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Message 3 of 6
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I attach my project.

 

I have 3 VI, one in FPGA, one in RTMain and one in computer (host)

I'm trying to turn on or turn off a led in sb-RIO trough commands.

I have tried to remove while loops but I don't obtain that I want.

In teststand I'm trying to test the Vi in computer (host.vi) , and i'm obtaining the previous error (which i started this issue)

 

Could you help me?

 

Thanks.

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Message 4 of 6
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Looking in your host.vi shows that the developer of that code is rather new to LV. The biggest issue you are running into is that this VI is not stopping by itself nor is stoppable properly by user interaction. The reason is a misconception on how the error wire is used to stop the loop(s). Also i recommend to use only a single loop to use the TCP connection.

Learn about shift register (or feedback nodes) for improving the code of this VI.

Norbert
----------------------------------------------------------------------------------------------------
CEO: What exactly is stopping us from doing this?
Expert: Geometry
Marketing Manager: Just ignore it.
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Message 5 of 6
(2,903 Views)

Could you help me to improve the vi?

 

Thanks

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Message 6 of 6
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