This is on a FlexRIO PXI-7952R device with an NI-6587 LVDS adapter.
I have a need to power down the DUT entirely, and noticed that even with all LVDS channels set to “Input,” and even with the “Gen_Reset” node in the serializer CLIP held at True, the NI 6587 still outputs a non-zero voltage on its LVDS lines (between ~0.8V on p channel, ~1.4V on n channel). This effectively winds up powering part of the DUT and is generally not a good thing.
I noticed that when the Reset Invoke Node is used the NI 6587 powers down its LVDS channels for a half second before they spring back up to a steady output - so it appears that the hardware is capable of being powered down.
I am wondering how National Instruments recommends that the LVDS channels on the NI 6587 be completely powered down during certain portions of a test. Even if it means completely powering down the NI 6587 module, or even powering down the PXI-7952R – as long as I can ensure that the DUT is in a zero energy state I will be good to go.
Thanks!
