11-05-2011 08:30 AM
11-08-2011 05:30 AM
Hi Andrew,
Thanks for your forum post regarding the jitter you are experiencing with your analogue measurements using the NI 9201. Having researched your issue I have come across the help file article here which details a potential cause of jitter due to resource contention on board the FPGA.
Basically the article describes that multiple requests on the same analogue input resource within the same FPGA clock cycle can introduce jitter, the jitter occurs most often when you use a shared subVI in two independent parts of the VI, or when you access a resource interface from parallel loops.
Please let me know if this assists in the debugging of your issue.
Many Thanks
Jamie S.