Hello!
Still trying to import my system design into the Socketed CLIP of a FlexRIO 7976R with the 6583 Adapter Module. Synthesis fail because compiler complains about missing IO of the wrapper. I tried to add the ports of my socketed CLIP top-level entity according to the 6583 reference, though there is something I'm not doing it right...
In the past, I got the wrapper for the 6591R from the aurora example files. No such example does exist for the 7976R/6583 (at least, which I'm aware of).
Can anyone point me to the right direction, provide me a complete list of the fixed-IO connectors the compiler is expecting or provide the VHDL wrapper I need? TY!
