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Why do I get overflow errors when running DSA and SCXI data together?

I am programming a high speed & low speed data system for a customer.

I have an application that reads and records the DSA (PXI-4472 modules) channels (up to 160) at 30,000 scans per second without errors.

The low speed data is comprised of strain data from eight SCXI 1520 modules in a 1001 chassis. The data enters the PXI chassis via a PXI 6052E MIO device. I have an application that reads and records this data up to 4,000 scans per second without errors.

My problem occurs when I try to read both systems with the same application. I have tried both parallel while loops and placing both AI reads in the same while loop, but I get the same error either way. One of the systems (PXI or SCXI)
generates an overflow error (-10846), even though I am running both at a quarter the successful stand alone rate.

The error manifests itself when the scan backlog from the SCXI AI read reaches zero. The scan backlog on the PXI data either goes to zero and stays, or climbs to very high values, and the waveforms stop updating.

I have experienced situations where either system has the error and the other system continues to acquire data, or where both lock up.

I am using continuous acquisition at AI start so I can monitor signals real time and periodically record 15 seconds of data from each system to a separate file.

Acquisition synchronization on the PXI chassis is via a timing module in each PXI chassis and the star trigger line. I am not so much concerned at this time with synching the data bettween the chassis.

If anyone has suggestions, I'd love to try them!
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Message 1 of 8
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What PXI chassis are you using and in which slots are your PXI cards? Have you tried changing PXI slots for the cards?
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Message 2 of 8
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The end product is two PXI-1045 chassis with 10 4472 cards and a 6052E in each chassis. Currently I am using 1 PXI chassis, 8 4472 cards and 1 6052E. Since each vi can run 4 times the combined speed, I didn't expect deleting cards would have an effect. I will check this.
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Message 3 of 8
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I have a 6652 timing card in slot 2, 4472 cards in slots 3 through 10, and the 6052E in slot 13.
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Message 4 of 8
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Are you using an embedded controller or a MXI product?

Can you try moving the 4472s to the far leftmost slots in the chassis?
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Message 5 of 8
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I am using a server, dual Xeon 3.2G processors, 1G RAM, raid 0 scsi disk array (all per NI recommendations). Two MXI-4 interfaces are connected from separate PCI busses in the server directly to the two chassis.

For each chassis, the MXI-4 is in slot 1; 665x timing module in slot 2; 4472's in slots 3-12; 6052E in slot 13.
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Message 6 of 8
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The error is not a device FIFO Overflow, but a host buffer overflow.

Can you increase the number of samples read at a time and/or increase the memory allocated for the buffer?
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Message 7 of 8
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I did the opposite in taking the sample rates down to 1000 for the pxi and 100 for the scxi. Program indications were identical. For some reason, the AI reads seem to be conflicting with each other. I have put them in separate loops, the same loop with error cluster execution control, and the same loop with stacked sequence structure execution control. When I had separate loops, I sometimes got this error on the scxi system, which has never shown a backlog remotely approaching the buffer limit. I think something else is causing this, but I'm not having much luck finding it.
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Message 8 of 8
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