hello,
when I test the NI PXI-6602 board to generate continuous pulses using counter 0,
I find that the Period of the generated pulses sometimes is not correct.
for example, when the first time I set the Period is 1s, it seems to be right.
the I change the Period to 1ms directly, the real test Period is 5s!
but if I change the Period step by step, 1s-->100ms-->10ms-->1ms, it is right again.
Anybody knows the reason?
you can see the sourcecode as bellow:
(Frequency= 1s,100ms,10ms,1ms. Dutycycle=0.5)
temp = 1000/Frequency; // T/us
//printf("temp = %f,\n", temp);
temp = temp/0.0125;
//printf("temp1 = %f,\n", temp);
high = (u32)(temp*Dutycycle);
if (high <1)high = 1;
low = (u32)(temp*(1.0-Dutycycle));
if (low <1)low = 1;
board->G0_Load_A_Registers.writeG0_Load_A(high);
board->G0_Load_B_Registers.writeG0_Load_B(low);
board->G0_Command_Register.writeG0_Load(1);
//reload from the other load register on each terminal count
board->G0_Mode_Register.writeG0_Reload_Source_Switching(1);
board->G0_Mode_Register.writeG0_Loading_On_TC(1);
//set source to internal timebase 3, the 80MHz internal clock
board->G0_Input_Select_Register.writeG0_Source_Select(30);
//set gate to disabled gating
board->G0_Input_Select_Register.writeG0_Gate_Select(30); //Logic Low
board->G0_Mode_Register.writeG0_Gate_Polarity(1);
board->G0_Command_Register.writeG0_Synchronized_Gate(1);
board->G0_Mode_Register.writeG0_Trigger_Mode_For_Edge_Gate(3);
board->G0_Mode_Register.writeG0_Gating_Mode(1);
//set counting direction to down
board->G0_Command_Register.writeG0_Up_Down(0);
//set PFI line to output
board->IO_Pin_36_37_Configuration_Register.writeIO_Pin_36_Select(1);
board->G0_Mode_Register.writeG0_Output_Mode(10);
//arm counter
board->G0_Command_Register.writeG0_Arm(1);
