Cannot acquire at 15000 samples per second fromcrio 9233 to crio9002

[Bipin]

Hi,

I am using Labview example vi(High Speed Continuous Buffered Data Acquisition with CompactRIO). I have some doubts.

I am using crio9002 and crio9233 with four input channels. My application requires to acquire data at 15000 samples per second per channel. Hence the scan rate in the fpga code is 66 microseconds. hence i should get a data every 66 micro seconds. The FIFO that i am using is Lookup table with I32 data type and 240 as depth. hence from each channel 60 samples are received before the FIFO is full.

The RT code seems to be running slower( the iteration count increments slowly).

1. Is the crio9002 capable of handling this much amout of data?
2. Is the FIFO that is configured as lookuptable of 240 depth with I32 correct for a sampling rate of 15000 correct. Should i use memory extension utility or any thing else?
3. Is the polling method faster compared to interrupt fro transferring between FPGA and Host ( it says somewhere at ni website) and is this suited for my current sampling rate.
4. I am not able to configure timed loop in RT for 1MHz. Does crio 9002 not allow you to configure timed loop. I also used rt wait loop timer but it did not help.

eagerly awaiting a response.

Best regards.

Bipin

[A.S.]

Hi Bipin,

I'm guessing you are referring to the application in the following document:http://zone.ni.com/devzone/conceptd.nsf/webmain/8e999a74e43ac76186256f5e0068cfac

You will notice that this application doesn't use interrupts for high-speed data transfer.  This is because interrupts can take upto 30 microseconds to handle, which is significant overhead in a high-speed application.  Polling method will be much faster than the interrupt based method. 

Question 1 & 3:

In the high-speed buffered data transfer application example:

"When using the CompactRIO Reconfigurable Embedded System, the data transfer rate between the RIO FPGA chipset and the embedded CompactRIO real-time controller is typically limited to about 70-100 kB/s. If the data is transferred as 16-bit words, this is equivalent to transferring the data from a 35-50 kS/s acquisition from one channel. The specific maximum transfer rate depends on the amount of processing and other operations that are performed in the LabVIEW Real-Time application. Using a PXI-8176 controller booted into the LabVIEW Real-Time operating system, the data transfer rate from FPGA to real-time controller is typically limited to about 500 kB/s. If the data is transferred as 16-bit words, this is equivalent to transferring the data from a 250 kS/s acquisition from one channel."

You are definitely trying to reach the upper limit (15kS/s x 4 channels = 60 kS/s) of 50 kS/s, and that too with interrupts.  If you use polling instead, you will see much better results.

Question 2:

If you are trying to store 15k samples from 4 channels of I32 data, that is equivalent of 15,000 S/channel x 4 channels x 4 bytes/sample = 240,000 bytes = 234 kB. Just using memory read/write VIs, you have access to 16kB of onboard memory.  But if you want access to the additional onboard memory (192 kB on cRIO 9103/9104, and 80kB on cRIO 9101/9102), you will need to use the memory extension utility

Question 4:

The cRIO controller's Time Loop has the highest configurable clock rate of 1kHz.  The cRIO controllers and Compact FieldPoint controllers have a clock granularity of 1ms.  Only PXI or ETS desktop based RT controllers have the 1MHz clock available for the Timed Loop timing, because of a much faster on-board processor.

Hope these answer your questions.  Please let me know if you have any additional questions.

Have a great day!

[jeff_scharpf]

Hi Bipin I have the same questions as you do. We recently purchased a CompactRIO and my boss is asking me a simple question, can we read 8 channels at 10KHZ each, continously and stream that to disk somehow.

So far all the examples (from NI tech support phone calls and emails) don't work correctly. They run but appear to alias so I don't think they're running as fast as I think they are. I still can't give my boss a straight answer other than no at this point. Our rep told us this was the best device for high speed remote data. So far it hasn't proven itself but I am hopeful still.

  I hope you get your answer, as I'd like to know it also.

Jeff

[naru]

Hi Jeff,

I am not sure about the ability of C-rio to acquire and transmitt to RT at the rate you have specified. I think you have seen the maximum bandwidth limited for data transfer between FPGA and RT. In My case I have adopted a workaround after realizing that the bandwidth does not allow for sampling at high rate. Hence I am reading in blocks of 4096 samples as in my application the processing and logging is on block of data and after a specified interval. Hence I did not have to try too hard in making the C-rio stream data at 15 K samples per second. I specifed the loop rate in FPGA as 65 microsecond i.e each data is sampled at the specified interval hence effictively giving an impression that 4096 samples are sampled at a sampling rate of 15384.615. I do not whether this will help you though.

Best Regards,

Bipin

[A.S.]

Hi Bipin,

You are correct in the method you are using.  As I had mentioned in my post earlier, the maximum transfer rate between the FPGA and the CompactRIO controller is between 70-100 kB/sec.

Jeff, about your question on whether you can acquire from 8 channels at 10 KHz: Here's the total bandwidth that would be required, if we used a 16-bit AI module such as the cRIO-9215:

10,000 S/sec/channel x 8 channels x 16 bits/sample = 1.28 x 10^6 bits/second ~= 1,250 kB/sec

So if you wanted to stream ALL this data to your disk at the same rate as your acquisition (10 kHz), you will need about 1.2 MB/s throughput rate.  This is not achievable with the CompactRIO platform due to the limitations on the backplane.  If you using a PXI controller with an R-series device (PXI-7831R), you could achieve rate a bit higher than 500 kB/sec.

Note that these limitations are in streaming the data from the FPGA to the RT controller's disk.  This is not a limitation of how fast the FPGA can acquire.

I hope this answers both your questions.  Please let us know if you have any further questions.

[preston_johnson]

Have you considered the NI implemented DSA 4408 code.  This is 9002 cRIO code for two of the 9233 modules and can acquire data at 33kSA/sec for 8 channels. 

http://sine.ni.com/nips/cds/view/p/lang/en/nid/202103 

If you alread have the hardware, you can dowload and try the code at:

http://zone.ni.com/devzone/conceptd.nsf/webmain/3F941A040879E64086256FA20067041A 

[daniel murmann]

Im having problems to acquire blocks of data from FPGA to RT is there any examples?

[Richard P.]

Hi Daniel,

Can you further specify blocks of data?