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CompactRIO Deploy Error "LabVIEW: Resource Not Found."

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Hi David,

Ignore what I wrote above about FXP

 

You might be treading on dangerous ground with your fpga code, both old and new.  You are using the modules in what is known as "calibrated" calibration mode i.e. fixed point math.  Your fpga square wave generation is using integer math which is normally used when the modules are operating in "raw" calibration mode. To change the calibration mode you need to right click on the module and select the mode youwish to use.  I do not suggest that you do this.

 

What you NEED to do to ensure correct operation of your fpga vi is to make sure that you are using integer and then converting to a FXP using the correct encoding ( whether it is signed, word length, and integer length).  In your case the 9263 requires a signed, 20bit word length, 5 bit integer length. 

 

To convert from a I32 to a FXP of the correct type you need to transform the I32 number to a boolean array then convert the boolean array to a number, right click the number output node and select the numeric node properties output configuration tab then uncheck the adapt to source button and set the properties to signed, 20bit word lenght, 5 bit integer length, this will produce a FXP in the range -16.0000 to +16.0000 with a delta of 3.0518e-5.

A 10.0000 FXP as a 20bit word, 5 bit integer is represented by a I32 value of 327680.

 


As for your new fpga code, I am not sure why you have used a sequence structure your reading of 18 channels on the 9205 will take 144 microseconds, and each write of two channels on the 9263 will take 5 microseconds.  I have not worked out how long the square wave generation will take.

 

I do not understand your most recent question. 

>>"I have attached a screen shot of my pwm_out.vi, if I remove the bottom read/write control, or if I don't at all use any of the analog inputs, it runs fine. 

>>But as soon as I add the analog inputs it fails...".

Have you created a new bitstream from your fpga_new.vi and referenced it in your pwm_out_new.vi on the RT?

It is hard to second guess what you are showing in the screen shots.  If the project is not too big then perhaps you could post it here. 

 

As mentioned earlier, by JMoto, software versions help as well.  Check in MAX what you have on your PC and also on the cRIO 9002 to make sure that there is no mismatch.

 

Cheers

Stephen

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Stephen Moore wrote:

Hi David,

You might be treading on dangerous ground with your fpga code, both old and new.  You are using the modules in what is known as "calibrated" calibration mode i.e. fixed point math.  Your fpga square wave generation is using integer math which is normally used when the modules are operating in "raw" calibration mode. To change the calibration mode you need to right click on the module and select the mode youwish to use.  I do not suggest that you do this.

 

What you NEED to do to ensure correct operation of your fpga vi is to make sure that you are using U32 math wire required and then convert the U32 to a FXP using the correct encoding ( whether it is signed, word length, and integer length).  In your case the 9263 requires a signed, 20bit word length, 5 bit integer length.  Insert a  FXP conversion between the square wave generation and either create a FXP constant of the correct type (or use a correctly set up control from one of the other 9263 channels [AO0 or AO1]) and wire it to the fixed point type node on the conversion OR define the fixed point conversion by right clicking on the output node and making the correct settings in the pop-up box.

 

As for your new fpga code, I am not sure why you have used a sequence structure your reading of 18 channels on the 9205 will take 144 microseconds, and each write of two channels on the 9263 will take 5 microseconds.  I have not worked out how long the square wave generation will take.

 

I do not understand your most recent question. 

>>"I have attached a screen shot of my pwm_out.vi, if I remove the bottom read/write control, or if I don't at all use any of the analog inputs, it runs fine. 

>>But as soon as I add the analog inputs it fails...".

Have you created a new bitstream from your fpga_new.vi and referenced it in your pwm_out_new.vi on the RT?

It is hard to second guess what you are showing in the screen shots.  If the project is not too big then perhaps you could post it here. 

 

As mentioned earlier, by JMoto, software versions help as well.  Check in MAX what you have on your PC and also on the cRIO 9002 to make sure that there is no mismatch.

 

Cheers

Stephen


Thanks Stephen, I converted the values from the square wave generator to FXP and also upgraded to 8.5.1 and now it seems to work, I also got rid of the sequence structure and put the sqaure wave blocks in seperate while loops.

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