[FPGA] How to reconnect to running compiles

[skaley]

Hello,

I am wondering if there is another way to reconnect to compiles on the cloud-service aside from clicking "reconnect to compilation" from the build spec in the project.

I'm running into an issue where if I close LabVIEW (for various reasons), I will often lose the compile entirely and have to start from scratch again. One reason this happens is that the FPGA VI has changed since the original compile, so I guess the project isn't able to find the on-going (or completed) compile because there's some sort of checksum that doesn't match?

When the compiles are sent to the cloud I'm sure there has to be some sort of identification/reference number. Is it possible to view/retrieve the compile even if the project thinks it needs to start over?

Thank you,

Sam

[DG76]

Hi,

 Why would you want to compile code if it no longer the latest version? If you make a change in the FPGA VI, surely it's the newest version of the code which needs to be compiled, otherwise why make a change? 

 You can always compile the FPGA code locally, even from another machine on the same network. Perhaps look into that?

 I'm not aware of any way to reconnect to an aborted compilation process from closing LabVIEW, and I wouldn't be surprised if LabVIEW needs to be kept open in order to reconnect as that doesn't sound like the sort of process that can be externalised. There may be security implications for NI's cloud server, for starters.

[skaley]

Hello, thanks for the reply!

> Why would you want to compile code if it no longer the latest version? 

I am right on the edge of timing violations (<1ns) so I am running several compiles with minor tweaks to hopefully get one to go through. At this point, if compile A goes through even though my FPGA VI is on version C - I will take compile A (assuming B & C failed aswell). Therefore, the newest version of the FPGA VI is not necessarily the only one I care about.

When I close LabVIEW, the compile is still running on the cloud. I know this because there are cases in which the right-click build spec option "reconnection to compilation" does work from time to time.

This issue goes beyond just changing the FPGA VI because this is only one case where I run into the problem. I have also seen this without modifying the FPGA VI - this was just a well defined example of the problem. I have tried creating copies of my FPGA VI, and copies of the build spec to work around this, but I still face the same issue of losing my compiles frequently.

Setting up my own compile service is not a terrible idea, but I would like to avoid it if possible as taking advantage of the cloud is much more convenient and has its own benefits (aside from the issue at hand).