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Failed FPGA Compilation

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I have successfully compiled an application using a cRIO-9103 chassis.  However, attempting to compile it to a cRIO-9114 chassis results in a compilation failure.  The report summary suggests to contact NI for technical support.  Attached is the complete report.

The reason I first tried the 9103 is because I have the hardware unit available and I used it to initially develop and test the application.  I attempted the 9114 because I'll need 8 slots and I’m trying to reduce the cost of this project.  (Actually I also attempted the cRIO-9112 chassis but it had a timing failure.)

Why is this failing?  Is the 9114 too small?  It’s unclear how to compare the 9103 to the 9114 in terms of processing ability.  I’m using a cRIO-9012 controller with LV 2009 SP1 and NI-RIO v.3.4.Please advise,Dave
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dj,

 

It looks like you have modified your Xilinx Compiler options.  It this the case?  If so what motivations did you have to modify these options? 

 

I would suggest using the default settings under "Xilinx Options" and try the compile again.

 

You could also start to systematically disable parts of your code to see if you can get it to compile.

 

steve

SteveA
CLD

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FPGA/RT/PDA/TP/DSC
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I didn't knowingly make any changes to the compiler options.  All I did was add another RT target to the project using the 9114 chassis.
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I since tried to compile the application to the cRIO-9116 chassis and it failed in a similar manner as the 9114 chassis.  Again I changed nothing except to add a new target in the project.  I then created another target but this time I selected the 9103 chassis.  I did this to see if will will still compile to the 9103 successfuly and it did.  I'm starting to think that the Vertex version cRIO chassis will not work for my application.  Any advice?
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Hi Dave,

 

Could you post your code so I can take a look at it?

 

Thanks!

 

Joe Daily
National Instruments
Applications Engineer

may the G be with you ....
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I just finished compiling to the cRIO-9104 and it was successful.  Attached is the project folder.  The current Bitfiles folder and Example.vi is the result of compiling for the 9104.  There are also TXT files that are records of the compilations.
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Hi Dave,

 

I was able to get your FPGA code to be able to compile on a 9114; Attached is the labview bit file. I was unable to get it to compile down to the 9112/9111.

 

 

Based on comparing your log file and mine it looks like you have a software mismatch in your LabVIEW toolchain. I know that you are working with another enginner on this.

 

Best of Luck!

Joe Daily
National Instruments
Applications Engineer

may the G be with you ....
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It was suggested that my NI-RIO (v.3.4) is possibly corrupted.  I uninstalled NI-RIO and reinstalled it using the down load version (v.3.4) from the NI web sit.  However, recompilation still fails to the cRIO-9114 chassis.  I also tried to compile it to the cRIO-9114 using Win-XP on an different computer; and it fails.  Attached are the two failure reports (Win7 and WinXP) it case it's useful.

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Hi Dave,

 

You are going to need to modify the install of the Xilinix tools which is part of LabVIEW FPGA. If you uninstall the tools, reboot and reinstall the tools that should fix the problem.

 

Please let me know how this works out.

Joe Daily
National Instruments
Applications Engineer

may the G be with you ....
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Hi Joe,  Yesterday evening in conjunction with Jason, we uninstalled the Xilinix tools and then reinstalled them using the developer suite DVD's.  I then set the project to compile to the cRIO-9114 chassis and when I came in this morning it failed in the usual way.  Is it possible there is something wrong with my developer suite?    I've been experimenting with this and discovered that if I strip most everything out of the Example.vi, it will successfully compile.  However, if all I do is add the I/O nodes to start the NI 9239 modules, it will not compile.  In other words, the attached VI will not compile unless I remove the I/O nodes in the initialization sequence.  For my system, it only takes about 7 minutes to compile.  I may be misled but it appears that something goes wrong when compiling with the I/O nodes to a Virtex-5 chassis. Dave

 

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