05-10-2012 11:21 AM
Hi all,
I am just trying to take an FFT of a real analog signal into my NI 5781. My code on the FPGA side, adapted from a NI example, basically looks like a single-cycle timed loop with an FFT IP inside. Everything works but I want to be able to change the integration time (sample number) as well as the sampling rate.
Sampling Rate:
I've been changing the sampling rate by deriving clocks from the 40MHz one on my FPGA. Problem is that the minimum is 2.5 MHz.
Integration Time:
I've been setting this by simply choosing the LENGTH my FFT IP works with (either 1024,2048,4096, 8192). LENGTH/SamplingRate = Integration time
It's no surprised that my options for sampling and integration time have been limited.
I would very much appreciate if some could provide me with tips or links to examples that show how I can get different sampling rates and integration times. Perhaps I could lower my sampling rate by a factor of two by writing to buffer only every other loop iteration. Things of that nature would be help.
Thanks!
05-11-2012 11:39 AM
Hi,
There is an example that shows how to use the FFT function in LabVIEW inside a SCTL if your data rate is slower than the loop rate. The example is called FFT with Handshaking - R Series. You can find it by going Help >> Find Examples. Once there navigate to Toolkits and Modules >> FPGA >> FPGA Fundamentlas >> Analysis and Control.
Let us know if that helps!